Datasheet
1
FEATURES
DESCRIPTION/ORDERING INFORMATION
SN74AVC32T245
32-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES553E – MAY 2004 – REVISED AUGUST 2007
www.ti.com
2
• Member of the Texas Instruments Widebus+™ • I/Os Are 4.6-V Tolerant
Family
• Max Data Rates
• Control Inputs V
IH
/V
IL
Levels Are Referenced to
– 380 Mbps (1.8-V to 3.3-V Translation)
V
CCA
Voltage
– 200 Mbps (< 1.8-V to 3.3-V Translation)
• V
CC
Isolation Feature – If Either V
CC
Input Is at
– 200 Mbps (Translate to 2.5 V or 1.8V)
GND, Both Ports Are in the High-Impedance
– 150 Mbps (Translate to 1.5 V)
State
– 100 Mbps (Translate to 1.2 V)
• Overvoltage-Tolerant Inputs/Outputs Allow
• Latch-Up Performance Exceeds 100 mA Per
Mixed-Voltage-Mode Data Communications
JESD 78, Class II
• Fully Configurable Dual-Rail Design Allows
• ESD Protection Exceeds JESD 22
Each Port to Operate Over Full 1.2-V to 3.6-V
Power-Supply Range – 4000-V Human-Body Model (A114-A)
• I
off
Supports Partial-Power-Down Mode – 200-V Machine Model (A115-A)
Operation
– 1000-V Charged-Device Model (C101)
This 32-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVC32T245 is optimized to operate with V
CCA
/V
CCB
set at 1.4 V to 3.6 V. It is operational with V
CCA
/V
CCB
as
low as 1.2 V. The A port is designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.2 V to 3.6 V. The
B port is designed to track V
CCB
. V
CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC32T245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable ( OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVC32T245 is designed so that the control pins (1DIR, 2DIR, 3DIR, 4DIR, 1 OE, 2 OE, 3 OE, and 4 OE)
are supplied by V
CCA
.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V
CC
isolation feature ensures that if either V
CC
input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
(1) (2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
LFBGA – GKE SN74AVC32T245GKER
– 40 ° C to 85 ° C LFBGA – ZKE (Pb-free) Tape and reel SN74AVC32T245ZKER WY245
LFBGA – ZRL (Pb-free) SN74AVC32T245ZRLR
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 Widebus+ is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2004 – 2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.