Datasheet

1
FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
6
5
4
V
CCA
GND
A
V
CCB
DIR
B
3
2
1
4
5
6
A
GND
V
CCA
B
DIR
V
CCB
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74AVCH1T45
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES598D JULY 2004 REVISED JANUARY 2008
www.ti.com
2
Available in the Texas Instruments NanoStar™
and NanoFree™ Packages
Control Inputs V
IH
/V
IL
Levels Are Referenced to
V
CCA
Voltage
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
I/Os Are 4.6-V Tolerant
I
off
Supports Partial-Power-Down Mode
Operation
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Typical Max Data Rates
380 Mbps (1.8-V to 3.3-V Translation)
200 Mbps (<1.8-V to 3.3-V Translation)
200 Mbps (Translate to 2.5 V or 1.8 V)
150 Mbps (Translate to 1.5 V)
100 Mbps (Translate to 1.2 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track V
CCA
. V
CCA
accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track
V
CCB
. V
CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional
translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCH1T45 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input.
The SN74AVCH1T45 is designed so that the DIR input is powered by V
CCA
.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
NanoFree™ WCSP (DSBGA)
Tape and reel SN74AVCH1T45YZPR _ _ _TF_
0.23-mm Large Bump YZP (Pb-free)
40 ° C to 85 ° C
SOT (SOT-23) DBV Tape and reel SN74AVCH1T45DBVR ET1_
SOT (SC-70) DCK Tape and reel SN74AVCH1T45DCKR TF_
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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