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FEATURES

DCT OR DCU PACKAGE

(TOP VIEW)

CCA

GND

CCB

DIR

YZP PACKAGE

(BOTTOM VIEW)

GND

CCA

DIR

CCB

D1 D2

C2C1

B1 B2

A1 A2

DESCRIPTION/ORDERING INFORMATION

SN74AVCH2T45

DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER

WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SCES582F – JULY 2004 – REVISED NOVEMBER 2007

www.ti.com

• Available in the Texas Instruments NanoFree™

Package

• Control Inputs V

Levels Are Referenced to

CCA

Voltage

• Fully Configurable Dual-Rail Design Allows

Each Port to Operate Over the Full 1.2-V to

3.6-V Power-Supply Range

• I/Os Are 4.6-V Tolerant

• I

off

Supports Partial Power-Down-Mode

Operation

• Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

• Max Data Rates

– 500 Mbps (1.8-V to 3.3-V Translation)

– 320 Mbps (<1.8-V to 3.3-V Translation)

– 320 Mbps (Translate to 2.5 V or 1.8 V)

– 280 Mbps (Translate to 1.5 V)

– 240 Mbps (Translate to 1.2 V)

• Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The

SN74AVCH2T45 is optimized to operate with V

CCA

CCB

set at 1.4 V to 3.6 V. It is operational with V

CCA

CCB

low as 1.2 V. The A port is designed to track V

CCA

. V

CCA

accepts any supply voltage from 1.2 V to 3.6 V. The B

port is designed to track V

CCB

. V

CCB

accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal

low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

(3)

NanoFree™ – WCSP (DSBGA)

Reel of 3000 SN74AVCH2T45YZPR _ _ _TF_

0.23-mm Large Bump – YZP (Pb-free)

– 40 ° C to 85 ° C

SSOP – DCT Reel of 3000 SN74AVCH2T45DCTR ET2_ _ _

VSSOP – DCU Reel of 3000 SN74AVCH2T45DCUR ET2_

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
www.ti.com SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES582F – JULY 2004 – REVISED NOVEMBER 2007 FEATURES 1 • Available in the Texas Instruments NanoFree™ Package • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range • I/Os Are 4.
PAGE 2
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 DESCRIPTION/ORDERING INFORMATION (CONTINUED) The SN74AVCH2T45 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input.
PAGE 3
www.ti.com SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.
PAGE 4
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.2 3.6 V VCCB Supply voltage 1.2 3.
PAGE 5
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V IOH = –3 mA 1.2 V 1.2 V IOH = –6 mA 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = –9 mA 2.3 V 2.3 V 1.75 IOH = –12 mA 3V 3V 2.3 IOL = 100 µA 1.2 V to 3.
PAGE 6
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Electrical Characteristics (continued) (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Ioff IOZ A port B port B port A port ICCA TEST CONDITIONS VI or VO = 0 to 3.6 V ICCB VI = VCCI or GND, ICCA + ICCB VI = VCCI or GND, 0V 0 V to 3.6 V ±0.1 ±1 ±5 0 V to 3.6 V 0V ±0.
PAGE 7
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.
PAGE 8
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.
PAGE 9
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Operating Characteristics TA = 25°C TEST CONDITIONS PARAMETER CpdA CpdB (1) (1) A-port input, B-port output B-port input, A-port output (1) A-port input, B-port output B-port input, A-port output VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.
PAGE 10
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 TYPICAL CHARACTERISTICS 6 6 5 5 4 4 tPHL (ns) tPLH (ns) Typical Propagation Delay (A to B) vs Load Capacitance TA = 25°C, VCCA = 1.2 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 3.
PAGE 11
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 TYPICAL CHARACTERISTICS (continued) 6 6 5 5 4 4 tPHL (ns) tPLH (ns) Typical Propagation Delay (A to B) vs Load Capacitance TA = 25°C, VCCA = 1.8 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 3.
PAGE 12
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 TYPICAL CHARACTERISTICS (continued) Typical Propagation Delay (A to B) vs Load Capacitance TA = 25°C, VCCA = 3.3 V 6 6 VCCB = 1.2 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.5 V VCCB = 1.8 V 5 VCCB = 1.8 V 5 VCCB = 2.5 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 3.
PAGE 13
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.1 V 0.
PAGE 14
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 APPLICATION INFORMATION Figure 12 is an example of the SN74AVCH2T45 circuit used in a unidirectional logic level-shifting application. VCC1 VCC2 VCC1 VCC2 1 8 2 7 3 6 4 5 VCC2 VCC1 SYSTEM-1 SYSTEM-2 Figure 12. Bidirectional Logic Level-Shifting Application PIN NAME FUNCTION 1 VCCA VCC1 SYSTEM-1 supply voltage (1.2 V to 3.
PAGE 15
SN74AVCH2T45 DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES582F – JULY 2004 – REVISED NOVEMBER 2007 Following is a sequence that shows data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1. STATE DIR CTRL I/O-1 I/O-2 DESCRIPTION 1 H Out In 2 H Hi-Z Hi-Z SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The bus-line state depends on bus hold.
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 20-May-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AVCH2T45DCUR US8 DCU 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 Q3 SN74AVCH2T45YZPR DSBGA YZP 8 3000 180.0 8.4 1.02 2.02 0.63 4.0 8.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AVCH2T45DCUR US8 DCU 8 3000 202.0 201.0 28.0 SN74AVCH2T45YZPR DSBGA YZP 8 3000 220.0 220.0 34.
PAGE 20
MECHANICAL DATA MPDS049B – MAY 1999 – REVISED OCTOBER 2002 DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,30 0,15 0,65 8 0,13 M 5 0,15 NOM ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ ÇÇÇÇÇ 2,90 2,70 4,25 3,75 Gage Plane PIN 1 INDEX AREA 1 0,25 4 0° – 8° 3,15 2,75 0,60 0,20 1,30 MAX Seating Plane 0,10 0,10 0,00 NOTES: A. B. C. D. 4188781/C 09/02 All linear dimensions are in millimeters. This drawing is subject to change without notice.
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D: Max = 1.918 mm, Min =1.858 mm E: Max = 0.918 mm, Min =0.
PAGE 25
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.