Datasheet

1
2
3
4
8
7
6
5
1OE
1A
1B
GND
V
CC
2OE
2B
2A
1
2
3
4
8
7
6
5
1OE
1A
1B
GND
V
CC
2OE
2B
2A
SN74CB3Q3305
www.ti.com SCDS141B –OCTOBER 2003–REVISED OCTOBER 2009
DUAL FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
Check for Samples: SN74CB3Q3305
1
FEATURES
• High-Bandwidth Data Path (up to 500 MHz)
PW PACKAGE
For additional information regarding the performance (TOP VIEW)
characteristics of the CB3Q family, refer to the TI application
report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature
number SCDA008.
• 5-V Tolerant I/Os With Device Powered Up or
Powered Down
• Low and Flat ON-State Resistance (r
on
)
Characteristics Over Operating Range
DCU PACKAGE
(r
on
= 3 Ω Typ)
(TOP VIEW)
• Rail-to-Rail Switching on Data I/O Ports
– 0- to 5-V Switching With 3.3-V V
CC
– 0- to 3.3-V Switching With 2.5-V V
CC
• Bidirectional Data Flow With Near-Zero
Propagation Delay
• Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF)
= 3.5 pF Typ)
• Fast Switching Frequency (f
OE
= 20 MHz Max)
DESCRIPTION/ORDERING INFORMATION
• Data and Control Inputs Provide Undershoot
The SN74CB3Q3305 is a high-bandwidth FET bus
Clamp Diodes
switch utilizing a charge pump to elevate the gate
• Low Power Consumption (I
CC
= 0.25 mA Typ)
voltage of the pass transistor, providing a low and flat
• V
CC
Operating Range From 2.3 V to 3.6 V
ON-state resistance (r
on
). The low and flat ON-state
• Data I/Os Support 0- to 5-V Signaling Levels
resistance allows for minimal propagation delay and
supports rail-to-rail switching on the data input/output
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
(I/O) ports. The device also features low data I/O
• Control Inputs Can Be Driven by TTL or
capacitance to minimize capacitive loading and signal
5-V/3.3-V CMOS Outputs
distortion on the data bus. Specifically designed to
• I
off
Supports Partial-Power-Down Mode
support high-bandwidth applications, the
Operation
SN74CB3Q3305 provides an optimized interface
solution ideally suited for broadband communications,
• Latch-Up Performance Exceeds 100 mA Per
networking, and data-intensive computing systems.
JESD 78, Class II
The SN74CB3Q3305 is organized as two 1-bit
• ESD Performance Tested Per JESD 22
switches with separate output-enable (1OE, 2OE)
– 2000-V Human-Body Model
inputs. It can be used as two 1-bit bus switches or as
(A114-B, Class II)
one 2-bit bus switch. When OE is high, the
– 1000-V Charged-Device Model (C101)
associated 1-bit bus switch is ON and the A port is
connected to the B port, allowing bidirectional data
• Supports Both Digital and Analog
flow between ports. When OE is low, the associated
Applications: USB Interface, Differential Signal
1-bit bus switch is OFF and a high-impedance state
Interface, Bus Isolation, Low-Distortion Signal
exists between the A and B ports.
Gating
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.