Datasheet

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Seemechanicaldrawingsfordimensions.
DBVPACKAGE
(TOP VIEW)
5
1
V
CC
OE
2
A
3
4
GND B
DCKPACKAGE
(TOP VIEW)
2
A
3
4
GND
V
CC
5
OE
B
1
DESCRIPTION/ORDERING INFORMATION
SN74CB3T1G125
SINGLE FET BUS SWITCH 2.5-V/3.3-V LOW-VOLTAGE SWITCH
WITH 5-V-TOLERANT LEVEL SHIFTER
SCDS150A – OCTOBER 2003 – REVISED SEPTEMBER 2006
• Output Voltage Translation Tracks V
CC
• Low Power Consumption
(I
CC
= 20 µ A Max)
• Supports Mixed-Mode Signal Operation on All
Data I/O Ports • V
CC
Operating Range From 2.3 V to 3.6 V
– 5-V Input Down to 3.3-V Output Level Shift • Data I/Os Support 0- to 5-V Signaling Levels
With 3.3-V V
CC
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
– 5-V/3.3-V Input Down to 2.5-V Output Level • Control Inputs Can Be Driven by TTL or
Shift With 2.5-V V
CC
5-V/3.3-V CMOS Outputs
• 5-V-Tolerant I/Os, With Device Powered Up or • I
off
Supports Partial-Power-Down Mode
Powered Down Operation
• Bidirectional Data Flow With Near-Zero • Latch-Up Performance Exceeds 250 mA Per
Propagation Delay JESD 17
• Low ON-State Resistance (r
on
) Characteristics • ESD Performance Tested Per JESD 22
(r
on
= 5 Ω Typ)
– 2000-V Human-Body Model
• Low Input/Output Capacitance Minimizes (A114-B, Class II)
Loading (C
io(OFF)
= 5 pF Typ)
– 1000-V Charged-Device Model (C101)
• Data and Control Inputs Provide Undershoot
• Supports Digital Applications: Level
Clamp Diodes
Translation, USB Interface, Bus Isolation
• Ideal for Low-Power Portable Equipment
The SN74CB3T1G125 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r
on
),
allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O
ports by providing voltage translation that tracks V
CC
. The SN74CB3T1G125 supports systems using 5-V TTL,
3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1 ).
The SN74CB3T1G125 is a 1-bit bus switch with a single ouput-enable ( OE) input. When OE is low, the bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE
is high, the bus switch is OFF, and a high-impedance state exists between the A and B ports.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
SOT (SOT-23) – DBV Reel of 3000 SN74CB3T1G125DBVR W25_
–40 ° C to 85 ° C
SOT (SC-70) – DCK Reel of 3000 SN74CB3T1G125DCKR WM_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) The actual top-side marking has one additional character that designates the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.