Datasheet

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SN54CBT16244, SN74CBT16244

16-BIT FET BUS SWITCHES

SCDS031I – MAY 1996 – REVISED OCTOBER 2000

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Members of Texas Instruments’ Widebus

Family

Standard ’16244-Type Pinout

5-Ω Switch Connection Between Two Ports

TTL-Compatible Input Levels

description

The ’CBT16244 devices provide 16 bits of

high-speed TTL-compatible bus switching in a

standard ’16244 device pinout. The low on-state

resistance of the switch allows connections to be

made with minimal propagation delay.

These devices are organized as four 4-bit

low-impedance switches with separate

output-enable (OE

) inputs. When OE is low, the

switch is on, and data can flow from port A to port

B, or vice versa. When OE is high, the switch is

open, and the high-impedance state exists

between the two ports.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SSOP DL

Tube SN74CBT16244DL

CBT16244

Cto85

SSOP

–

Tape and reel SN74CBT16244DLR

CBT16244

–

40°C

85°C

TSSOP – DGG Tape and reel SN74CBT16244DGGR CBT16244

TVSOP – DGV Tape and reel SN74CBT16244DGVR CY244

–55°C to 125°C CFP – WD Tube SNJ54CBT16244WD SNJ54CBT16244WD

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

FUNCTION TABLE

(each 4-bit bus switch)

INPUT

OUTPUTS

A, B

L A port = B port

H Disconnect

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1OE

1B1

1B2

GND

1B3

1B4

2B1

2B2

GND

2B3

2B4

3B1

3B2

GND

3B3

3B4

4B1

4B2

GND

4B3

4B4

4OE

2OE

1A1

1A2

GND

1A3

1A4

2A1

2A2

GND

2A3

2A4

3A1

3A2

GND

3A3

3A4

4A1

4A2

GND

4A3

4A4

3OE

SN54CBT16244 . . . WD PACKAGE

SN74CBT16244 . . . DGG, DGV, OR DL PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Widebus is a trademark of Texas Instruments.

Summary of content (13 pages)

PAGE 1
SN54CBT16244, SN74CBT16244 16-BIT FET BUS SWITCHES SCDS031I – MAY 1996 – REVISED OCTOBER 2000 D D D D Members of Texas Instruments’ Widebus  Family Standard ’16244-Type Pinout 5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels SN54CBT16244 . . . WD PACKAGE SN74CBT16244 . . .
PAGE 2
SN54CBT16244, SN74CBT16244 16-BIT FET BUS SWITCHES SCDS031I – MAY 1996 – REVISED OCTOBER 2000 logic diagram (positive logic) 1A1 47 2 43 6 1A4 1B1 2A1 1B4 2A4 1 8 37 12 2B1 2B4 48 1OE 3A1 41 2OE 36 13 32 17 3A4 3B1 4A1 3B4 4A4 25 30 19 26 23 4B1 4B4 24 3OE 4OE absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
SN54CBT16244, SN74CBT16244 16-BIT FET BUS SWITCHES SCDS031I – MAY 1996 – REVISED OCTOBER 2000 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II ICC II = –18 mA VI = 5.5 V VCC = 5.5 V VCC = 5.5 V, VI = VCC or GND VI = 5.5 V or GND IO = 0, One input at 3.4 V, Control inputs VCC = 5.5 V, Other inputs at VCC or GND Ci Control inputs VI = 3 V or 0 ron§ MIN VCC = 4.
PAGE 4
SN54CBT16244, SN74CBT16244 16-BIT FET BUS SWITCHES SCDS031I – MAY 1996 – REVISED OCTOBER 2000 PARAMETER MEASUREMENT INFORMATION TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V Open 7V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω 3V Output Control LOAD CIRCUIT 1.5 V 1.5 V 0V tPLZ tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V 3.5 V 1.5 V 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.6 15.8 1.8 12.0 24.0 Q1 SN74CBT16244DGGR TSSOP DGG 48 2000 330.0 24.4 SN74CBT16244DGVR TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 SN74CBT16244DLR SSOP DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74CBT16244DGGR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74CBT16244DGVR TVSOP DGV 48 2000 367.0 367.0 38.0 SN74CBT16244DLR SSOP DL 48 1000 367.0 367.0 55.
PAGE 9
MECHANICAL DATA MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 LEADS SHOWN 0.120 (3,05) 0.075 (1,91) 0.009 (0,23) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.250 (6,35) 0.390 (9,91) 0.370 (9,40) 0.370 (9,40) 0.250 (6,35) 48 1 0.025 (0,635) A 0.014 (0,36) 0.008 (0,20) 25 24 NO. OF LEADS** 48 56 A MAX 0.640 (16,26) 0.740 (18,80) A MIN 0.610 (15,49) 0.710 (18,03) 4040176 / D 10/97 NOTES: A. B. C. D. E.
PAGE 10
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 11
PAGE 12
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 13
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.