Datasheet

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      
      
SCDS140 − OCTOBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
D B-Port Outputs Are Precharged by Bias
Voltage (BIASV) to Minimize Signal
Distortion During Live Insertion and
Hot-Plugging
D Supports PCI Hot Plug
D Bidirectional Data Flow, With Near-Zero
Propagation Delay
D Low ON-State Resistance (r
on
)
Characteristics (r
on
= 3 Typical)
D Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF)
= 5.5 pF Typical)
D Data and Control Inputs Provide
Undershoot Clamp Diodes
D Low Power Consumption
(I
CC
= 3 µA Max)
D V
CC
Operating Range From 4 V to 5.5 V
D Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
D Control Inputs Can be Driven by TTL or
5-V/3.3-V CMOS Outputs
D I
off
Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D Supports Both Digital and Analog
Applications: PCI Interface, Memory
Interleaving, Bus Isolation, Low-Distortion
Signal Gating
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
BIASV
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DB, DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
120
10 11
2
3
4
5
6
7
8
9
19
18
17
16
15
14
13
12
OE
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
A8
B8
V
G
ND
CC
BIASV
description/ordering information
The SN74CBT6845C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (r
on
),
allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the
SN74CBT6845C provides protection for undershoot up to −2 V by sensing an undershoot event and ensuring
that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias
voltage (BIASV) to minimize live-insertion noise.
Copyright 2003, Texas Instruments Incorporated
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