Datasheet

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FEATURES
V
CC
3
2
4
51
OE
B
A
GND
DBVPACKAGE
(TOP VIEW)
3
2
4
51
OE V
CC
B
A
GND
Seemechanicaldrawingsfordimensions.
DCKPACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
OE
B
A
2
1
4
SN74CBTD1G125
SINGLE FET BUS SWITCH
WITH LEVEL SHIFTING
SCDS063L – JULY 1998 – REVISED JUNE 2006
• 5- Ω Switch Connection Between Two Ports • ESD Protection Exceeds JESD 22
• TTL-Compatible Control Input Levels – 2000-V Human-Body Model (A114-A)
• Latch-Up Performance Exceeds 100 mA Per – 200-V Machine Model (A115-A)
JESD 78, Class II
The SN74CBTD1G125 features a single high-speed line switch. The switch is disabled when the output-enable
( OE) input is high. A diode to V
CC
is integrated on the chip to allow for level shifting from 5-V signals at the
device inputs to 3.3-V signals at the device outputs.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
Reel of 3000 SN74CBTD1G125DBVR
SOT (SOT-23) – DBV P25_
Reel of 250 SN74CBTD1G125DBVT
–40 ° C to 85 ° C
Reel of 3000 SN74CBTD1G125DCKR
SOT (SC-70) – DCK PM_
Reel of 250 SN74CBTD1G125DCKT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
FUNCTION
OE
L A port = B port
H Disconnect
LOGIC DIAGRAM (POSITIVE LOGIC)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.