Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Multiplexer, demux FET multiplexer/demultiplexer Single supply SSOP 56

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   

SCDS055K − MARCH 1998 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Member of the Texas Instruments

Widebus Family

D 4-Ω Switch Connection Between Two Ports

D Rail-to-Rail Switching on Data I/O Ports

D I

off

Supports Partial-Power-Down Mode

Operation

D Make-Before-Break Feature

D Internal 500-Ω Pulldown Resistors to

Ground

D Latch-Up Performance Exceeds 250 mA Per

JESD 17

description/ordering information

The SN74CBTLV16292 is a 12-bit 1-of-2

high-speed FET multiplexer/demultiplexer. The

low on-state resistance of the switch allows

connections to be made with minimal propagation

delay.

When the select (S) input is low, port A is

connected to port B1, and R

INT

is connected to

port B2. When S is high, port A is connected to

port B2, and R

INT

is connected to port B1.

This device is fully specified for

partial-power-down applications using I

off

. The I

off

feature ensures that damaging current will not

backflow through the device when it is powered

down. The device has isolation during power off.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SSOP − DL

Tube SN74CBTLV16292DL

CBTLV16292

−40°C to 85°C

SSOP − DL

Tape and reel SN74CBTLV16292DLR

CBTLV16292

−40

C to 85

TSSOP − DGG Tape and reel SN74CBTLV16292GR CBTLV16292

TVSOP − DGV Tape and reel SN74CBTLV16292VR CN292

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DGG, DGV, OR DL PACKAGE

(TOP VIEW)

GND

10A

11A

12A

1B1

1B2

2B1

2B2

3B1

GND

3B2

4B1

4B2

5B1

5B2

6B1

6B2

7B1

7B2

8B1

GND

8B2

9B1

9B2

10B1

10B2

11B1

11B2

12B1

12B2

NC − No internal connection

Widebus is a trademark of Texas Instruments.

Summary of content (13 pages)

PAGE 1
SCDS055K − MARCH 1998 − REVISED OCTOBER 2003 D Member of the Texas Instruments D D D D D D DGG, DGV, OR DL PACKAGE (TOP VIEW) Widebus Family 4-Ω Switch Connection Between Two Ports Rail-to-Rail Switching on Data I/O Ports Ioff Supports Partial-Power-Down Mode Operation Make-Before-Break Feature Internal 500-Ω Pulldown Resistors to Ground Latch-Up Performance Exceeds 250 mA Per JESD 17 S 1A NC 2A NC 3A NC GND
PAGE 2
SCDS055K − MARCH 1998 − REVISED OCTOBER 2003 FUNCTION TABLE INPUT S FUNCTION L A port = B1 port RINT = B2 port H A port = B2 port RINT = B1 port logic diagram (positive logic) 54 2 1A 1B1 SW RINT RINT 53 SW 27 30 12B1 SW 12A 1B2 RINT RINT 29 12B2 SW 1 S 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PAGE 3
SCDS055K − MARCH 1998 − REVISED OCTOBER 2003 simplified schematic, each FET switch A B (OE) absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . .
PAGE 4
SCDS055K − MARCH 1998 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VIK II VCC = 3 V, VCC = 3.6 V, II = −18 mA VI = VCC or GND Ioff ICC VCC = 0, VCC = 3.6 V, VI or VO = 0 to 3.6 V IO = 0, VI = VCC or GND One input at 3 V, ∆ICC‡ Control input Ci Control input VCC = 3.6 V, VI = 3.
PAGE 5
SCDS055K − MARCH 1998 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 2 × VCC RL From Output Under Test S1 Open GND CL (see Note A) TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND RL LOAD CIRCUIT VCC CL RL V∆ 2.5 V ±0.2 V 3.3 V ±0.3 V 30 pF 50 pF 500 Ω 500 Ω 0.15 V 0.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.com (3) 11-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74CBTLV16292DLR SSOP DL 56 1000 330.0 32.4 11.35 18.67 3.1 16.0 32.0 Q1 SN74CBTLV16292GR TSSOP DGG 56 2000 330.0 24.4 8.6 15.6 1.8 12.0 24.0 Q1 SN74CBTLV16292VR TVSOP DGV 56 2000 330.0 24.4 6.8 11.7 1.6 12.0 24.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74CBTLV16292DLR SSOP DL 56 1000 367.0 367.0 55.0 SN74CBTLV16292GR TSSOP DGG 56 2000 367.0 367.0 45.0 SN74CBTLV16292VR TVSOP DGV 56 2000 367.0 367.0 45.
PAGE 10
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 11
PAGE 12
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 13
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.