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SN74CBTLV3384

LOW-VOLTAGE 10-BIT FET BUS SWITCH

SCDS059G − MARCH 1998 − REVISED JUNE 2004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 5-Ω Switch Connection Between Two Ports

D Rail-to-Rail Switching on Data I/O Ports

D I

off

Supports Partial-Power-Down Mode

Operation

D Latch-Up Performance Exceeds 250 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

description/ordering information

The SN74CBTLV3384 provides ten bits of

high-speed bus switching. The low on-state

resistance of the switch allows connections to be

made with minimal propagation delay.

The device is organized as dual 5-bit bus switches

with separate output-enable (OE

) inputs. It can be

used as two 5-bit bus switches or one 10-bit bus switch. When OE

is low, the associated 5-bit bus switch is on,

and A port is connected to B port. When OE

is high, the switch is open, and the high-impedance state exists

between the two ports.

This device is fully specified for partial-power-down applications using I

off

. The I

off

feature ensures that

damaging current will not backflow through the device when it is powered down. The device has isolation during

power off.

To ensure the high-impedance state during power up or power down, OE shall be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QSOP − DBQ Tape and reel SN74CBTLV3384DBQR CBTLV3384

SOIC DW

Tube SN74CBTLV3384DW

CBTLV3384

−40°C to 85°C

SOIC − DW

Tape and reel SN74CBTLV3384DWR

CBTLV3384

TSSOP − PW Tape and reel SN74CBTLV3384PWR CL384

TVSOP − DGV Tape and reel SN74CBTLV3384DGVR CL384

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

(each 5-bit bus switch)

INPUTS

INPUTS/OUTPUTS

1OE 2OE 1B1−1B5 2B1−2B5

L L 1A1−1A5 2A1−2A5

L H 1A1−1A5 Z

H LZ2A1−2A5

H H Z Z

DBQ, DGV, DW, OR PW PACKAGE

(TOP VIEW)

1OE

1B1

1A1

1A2

1B2

1B3

1A3

1A4

1B4

1B5

1A5

GND

2B5

2A5

2A4

2B4

2B3

2A3

2A2

2B2

2B1

2A1

2OE

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Summary of content (15 pages)

PAGE 1
SN74CBTLV3384 LOW-VOLTAGE 10-BIT FET BUS SWITCH SCDS059G − MARCH 1998 − REVISED JUNE 2004 D 5-Ω Switch Connection Between Two Ports D Rail-to-Rail Switching on Data I/O Ports D Ioff Supports Partial-Power-Down Mode D D DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW) 1OE 1B1 1A1 1A2 1B2 1B3 1A3 1A4 1B4 1B5 1A5 GND Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) description/ordering information The SN74CBTLV
PAGE 2
SN74CBTLV3384 LOW-VOLTAGE 10-BIT FET BUS SWITCH SCDS059G − MARCH 1998 − REVISED JUNE 2004 logic diagram (positive logic) 2 3 1A1 10 11 1A5 1OE 2A1 1B5 SW 1 15 14 2B1 SW 23 22 2A5 2OE 1B1 SW SW 2B5 13 simplified schematic, each FET switch A B (OE) absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
PAGE 3
SN74CBTLV3384 LOW-VOLTAGE 10-BIT FET BUS SWITCH SCDS059G − MARCH 1998 − REVISED JUNE 2004 recommended operating conditions (see Note 3) VCC Supply voltage VIH High level control input voltage High-level VIL Low level control input voltage Low-level TA Operating free-air temperature MIN MAX 2.3 3.6 VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 V V VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.
PAGE 4
SN74CBTLV3384 LOW-VOLTAGE 10-BIT FET BUS SWITCH SCDS059G − MARCH 1998 − REVISED JUNE 2004 PARAMETER MEASUREMENT INFORMATION 2 × VCC RL From Output Under Test S1 Open GND CL (see Note A) TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND RL LOAD CIRCUIT VCC CL RL VΔ 2.5 V ±0.2 V 3.3 V ±0.3 V 30 pF 50 pF 500 Ω 500 Ω 0.15 V 0.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 24-Jan-2013 Status (1) SN74CBTLV3384PWR ACTIVE Package Type Package Pins Package Qty Drawing TSSOP PW 24 2000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU NIPDAU Level-1-260C-UNLIM (4) -40 to 85 CL384 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 9.0 2.1 8.0 16.0 Q1 SN74CBTLV3384DBQR SSOP DBQ 24 2500 330.0 16.4 SN74CBTLV3384DGVR TVSOP DGV 24 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74CBTLV3384DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74CBTLV3384DBQR SSOP DBQ 24 2500 367.0 367.0 38.0 SN74CBTLV3384DGVR TVSOP DGV 24 2000 367.0 367.0 35.0 SN74CBTLV3384DWR SOIC DW 24 2000 367.0 367.0 45.0 SN74CBTLV3384PWR TSSOP PW 24 2000 367.0 367.0 38.
PAGE 9
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.