Datasheet



SDFS006AMARCH 1987 − REVISED OCTOBER 1993
Copyright 1993, Texas Instruments Incorporated
2−1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
description
These devices contain two independent 4-input
AND gates. They perform the Boolean functions
Y = A B C D or Y = A
+ B + C + D in positive
logic.
The SN54F21 is characterized for operation over
the full military temperature range of −55°C to
125°C. The SN74F21 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
A B C D
OUTPUT
Y
H H H H H
L XXX L
X LXX L
X XLX L
X X X L L
logic symbol
&
1Y
6
2Y
8
1
1A
2
1B
4
1C
5
1D
9
2A
10
2B
12
2C
13
2D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
logic diagram, each gate (positive logic)
Y
A
B
C
D
SN54F21 ...J PACKAGE
SN74F21 ...D OR N PACKAGE
(TOP VIEW)
SN54F21 . . . FK PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2C
NC
NC
NC
2B
NC
NC
1C
NC
1D
1B
1A
NC
2Y
2A
V
2D
1Y
GND
NC
CC
NC − No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
NC
1C
1D
1Y
GND
V
CC
2D
2C
NC
2B
2A
2Y
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