Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Latch Transparent D latch Three-state SOIC 20







SDFS011A − MARCH 1987 − REVISED OCTOBER 1993

2−1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

• Eight Latches in a Single Package

• 3-State Bus-Driving True Outputs

• Full Parallel Access for Loading

• Buffered Control Inputs

• Package Options Include Plastic

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These 8-bit latches feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing buffer

registers, I/O ports, bidirectional bus drivers, and

working registers.

The eight latches of the ′F573 are transparent

D-type latches. While the latch enable (LE) input

is high, the Q outputs follow the data (D) inputs.

When the latch enable is taken low, the Q outputs

are latched at the logic levels set up at the D

inputs.

A buffered output enable (OE

) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or a high-

impedance state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

The output enable (OE

) input does not affect the internal operations of the latches. Old data can be retained

or new data can be entered while the outputs are in the high-impedance state.

The SN54F573 is characterized for operation over the full military temperature range of −55°C to 125°C. The

SN74F573 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE

(each latch)

INPUTS

OUTPUT

OE LE D

OUTPUT

L H H H

L HL L

L LX Q

H X X Z

GND

SN54F573 ...J PACKAGE

SN74F573 . . . DW OR N PACKAGE

(TOP VIEW)

3 2 1 20 19

910111213

SN54F573 . . . FK PACKAGE

(TOP VIEW)

  ! " #$%! "  &$'(#! )!%*

)$#!" # ! "&%##!" &% !+% !%"  %," "!$%!"

"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)%

!%"!/  (( &%!%"*

Summary of content (5 pages)

PAGE 1
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 SN54F573 . . . J PACKAGE SN74F573 . . .
PAGE 2
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 logic symbol† OE LE 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 logic diagram (positive logic) EN OE C1 19 1D 3 18 4 17 5 16 6 15 7 14 8 13 9 12 LE 1 11 1Q C1 2Q 1D 3Q 2 19 1Q 1D 4Q 5Q 6Q 7Q To Seven Other Channels 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PAGE 3
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54F573 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V VCC = 4.75 V, MIN II = − 18 mA IOH = − 1 mA −1.2 IOH = − 3 mA IOH = − 1 mA to − 3 mA VOL VCC = 4.5 V IOL = 20 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V II IIH VCC = 5.
PAGE 4
SDFS011A − MARCH 1987 − REVISED OCTOBER 1993 2−4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 •
PAGE 5
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.