SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 13 ns ±4-mA Output Drive at 5 V D D D D Low Input Current of 1 µA Max Synchronous Load Direct Overriding Clear Parallel-to-Serial Conversion SN54HC166 . . . J OR W PACKAGE SN74HC166 . . .
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 description/ordering information (continued) These parallel-in or serial-in, serial-out registers feature gated clock (CLK, CLK INH) inputs and an overriding clear (CLR) input. The parallel-in or serial-in modes are established by the shift/ load (SH/LD) input. When high, SH/LD enables the serial (SER) data input and couples the eight flip-flops for serial shifting with each clock (CLK) pulse.
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 typical clear, shift, load, inhibit, and shift sequence CLK CLK INH CLR SER SH/LD Parallel Inputs A H B L C H D L E H F L G H H H QH Serial Shift Clear H Inhibit H L H L H L H Serial Shift Load absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 recommended operating conditions (see Note 3) SN54HC166 VCC Supply voltage VIH VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO Input voltage NOM MAX 2 5 6 NOM MAX 2 5 6 1.5 3.15 3.15 4.2 4.2 0 VCC = 6 V UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time MIN 1.
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC fclock Clock frequency CLR low tw Pulse duration CLK high or low SH/LD high before CLK↑ SER before CLK↑ tsu Setup time CLK INH low before CLK↑ Data before CLK↑ CLR inactive before CLK↑ SH/LD high after CLK↑ SER after CLK CLK↑ th Hold time CLK INH high after CLK↑ Data after CLK CLK↑ POST O
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tPHL tpd CLR CLK tt QH QH Any VCC MIN TA = 25°C TYP MAX SN54HC166 MIN MAX SN74HC166 MIN 2V 6 11 4.2 5 4.5 V 31 36 21 25 6V 36 45 25 29 MAX UNIT MHz 2V 62 120 180 150 4.
SCLS117D − DECEMBER 1982 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 50% 10% 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 90% tr th 90% tPHL Out-of-Phase Output
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74HC166DBR SSOP SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 12.0 16.0 Q1 DB 16 2000 330.0 16.4 8.2 6.6 2.5 SN74HC166DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN74HC166NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC166DBR SSOP DB 16 2000 346.0 346.0 33.0 SN74HC166DR SOIC D 16 2500 333.2 345.9 28.6 SN74HC166NSR SO NS 16 2000 346.0 346.0 33.0 SN74HC166PWR TSSOP PW 16 2000 346.0 346.0 29.
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.
MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC166DBR SSOP DB 16 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74HC166DR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.0 Q1 SN74HC166DRG4 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC166DBR SSOP DB 16 2000 367.0 367.0 38.0 SN74HC166DR SOIC D 16 2500 364.0 364.0 27.0 SN74HC166DRG4 SOIC D 16 2500 333.2 345.9 28.6 SN74HC166PWR TSSOP PW 16 2000 367.0 367.0 35.0 SN74HC166PWT TSSOP PW 16 250 367.0 367.0 35.
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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