Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Counter Binary counter 74HC Positive slope 24 MHz SOIC 16 N

 

    

SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D Outputs Can Drive Up To 10 LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 13 ns

D ±4-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Single Down/Up Count-Control Line

D Look-Ahead Circuitry Enhances Speed of

Cascaded Counters

D Fully Synchronous in Count Modes

D Asynchronously Presettable With Load

Control

description/ordering information

The ’HC191 devices are 4-bit synchronous,

reversible, up/down binary counters.

Synchronous counting operation is provided by

having all flip-flops clocked simultaneously so that

the outputs change coincident with each other

when instructed by the steering logic. This mode

of operation eliminates the output counting spikes

normally associated with asynchronous

(ripple-clock) counters.

The outputs of the four flip-flops are triggered on

a low- to high-level transition of the clock (CLK)

input if the count-enable (CTEN

) input is low. A

high at CTEN inhibits counting. The direction of

the count is determined by the level of the

down/up (D/U

) input. When D/U is low, the counter

counts up, and when D/U is high, it counts down.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 25 SN74HC191N SN74HC191N

Tube of 40 SN74HC191D

−40°C to 85°C SOIC − D

Reel of 2500 SN74HC191DR

HC191

−40 C to 85 C

SOIC − D

Reel of 250 SN74HC191DT

HC191

SOP − NS Reel of 2000 SN74HC191NSR HC191

CDIP − J Tube of 25 SNJ54HC191J SNJ54HC191J

−55°C to 125°C

CFP − W Tube of 150 SNJ54HC191W SNJ54HC191W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC191FK SNJ54HC191FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CTEN

D/U

GND

CLK

RCO

MAX/MIN

LOAD

SN54HC191 ...J OR W PACKAGE

SN74HC191 . . . D, N, OR NS PACKAGE

(TOP VIEW)

3212019

910111213

CLK

RCO

MAX/MIN

LOAD

CTEN

D/U

GND

SN54HC191 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

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Summary of content (21 pages)

PAGE 1
SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 D D D D D D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 13 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Single Down/Up Count-Control Line Look-Ahead Circuitry Enhances Speed of Cascaded Counters Fully Synchronous in Count Modes Asynchronously Presettable With Load Control SN54HC191 . . .
PAGE 2
SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 description/ordering information (continued) These counters feature a fully independent clock circuit. Change at the control (CTEN and D/U) inputs that modifies the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter is dictated solely by the condition meeting the stable setup and hold times.
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SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 logic diagram (positive logic) 12 CTEN 4 13 D/U 5 CLK 14 LOAD 11 A 15 S 3 C1 1D R B MAX/MIN RCO QA 1 S 2 QB C1 1D R C 10 S 6 C1 1D R D QC 9 S C1 1D R 7 QD Pin numbers shown are for the D, J, N, NS, and W packages.
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SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 typical load, count, and inhibit sequence The following sequence is illustrated below: 1. Load (preset) to binary 13 2. Count up to 14, 15 (maximum), 0, 1, and 2 3. Inhibit 4.
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SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −20 µA VOH VI = VIH or VIL IOH = −4 mA IOH = −5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci 6 VI = VCC or 0 VI = VCC or 0, IO = 0 VCC MIN TA = 25°C TYP MAX SN54HC191 MIN MAX SN74HC191 MIN 2V 1.9 1.998 1.9 1.9 4.
PAGE 7
SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC fclock Clock frequency LOAD low tw Pulse duration CLK high or low Data before LOAD↑ CTEN before CLK↑ tsu Setup time D/U before CLK↑ LOAD inactive before CLK↑ Data after LOAD↑ th Hold time CTEN after CLK↑ D/U after CLK CLK↑ POST OFFICE BOX 655303 TA = 25°C MIN MAX SN54HC191 MIN MAX S
PAGE 8
SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax LOAD A, B, C, or D Any Q QA, QB, QC, or QD RCO CLK Any Q tpd MAX/MIN RCO D/U MAX/MIN CTEN tt RCO Any VCC MIN TA = 25°C TYP MAX SN54HC191 MIN MAX SN74HC191 MIN 2V 4.2 8 2.8 3.3 4.
PAGE 9
SCLS121D − DECEMBER 1982 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 50% 10% 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 90% tr th 90% tPHL Out-of-Phase Out
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC191DR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SN74HC191NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC191DR SN74HC191NSR SOIC D 16 2500 333.2 345.9 28.6 SO NS 16 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.