Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver TSSOP 20

 

    

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SCLS300C − JANUARY 1996 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current Outputs Drive Up To 15

LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 11 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D 3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54HC241 ...J OR W PACKAGE

SN74HC241 ...DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54HC241 . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

GND

2A1

description/ordering information

These octal buffers and line drivers are designed specifically to improve both the performance and density of

3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC241

devices are organized as two 4-bit buffers/drivers with separate output-enable (1OE

and 2OE) inputs. When

1OE

is low or 2OE is high, the device passes noninverted data from the A inputs to the Y outputs. When 1OE

is high or 2OE is low, the outputs for the respective buffers/drivers are in the high-impedance state.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HC241N SN74HC241N

SOIC − DW

Tube of 25 SN74HC241DW

HC241

SOIC − DW

Reel of 2000 SN74HC241DWR

HC241

−40°C to 85°C

SOP − NS Reel of 2000 SN74HC241NSR HC241

−40 C to 85 C

Reel of 70 SN74HC241PW

TSSOP − PW

Reel of 2000 SN74HC241PWR

HC241

TSSOP − PW

Reel of 250 SN74HC241PWT

HC241

CDIP − J Tube of 20 SNJ54HC241J SNJ54HC241J

−55°C to 125°C

CFP − W Tube of 85 SNJ54HC241W SNJ54HC241W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC241FK SNJ54HC241FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (19 pages)

PAGE 1
SCLS300C − JANUARY 1996 − REVISED AUGUST 2003 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 11 ns D ±6-mA Output Drive at 5 V D Low Input Current of 1 µA Max D 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers SN54HC241 . . . J OR W PACKAGE SN74HC241 . . .
PAGE 2
SCLS300C − JANUARY 1996 − REVISED AUGUST 2003 FUNCTION TABLES INPUTS 1OE 1A OUTPUT 1Y L H H L L L H X Z INPUTS 2OE 2A OUTPUT 2Y H H H H L L L X Z logic diagram (positive logic) 1 19 2OE 1OE 1A1 1A2 1A3 1A4 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
PAGE 3
SCLS300C − JANUARY 1996 − REVISED AUGUST 2003 recommended operating conditions (see Note 3) SN54HC241 VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO ∆t/∆v MIN NOM MAX 2 5 6 Input voltage MAX 2 5 6 3.15 3.15 4.2 4.2 0 VCC = 6 V UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time NOM 1.
PAGE 4
SCLS300C − JANUARY 1996 − REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC241 SN74HC241 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 39 115 170 145 tpd A Y 4.5 V 12 23 34 29 6V 11 20 29 25 ten OE or OE tdis OE or OE tt Y Y Y MIN MIN MAX MIN MAX 2V 60 150 225 190 4.
PAGE 5
SCLS300C − JANUARY 1996 − REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION VCC PARAMETER Test Point From Output Under Test S1 ten RL CL (see Note A) tdis S2 tPZH RL 1 kΩ tPZL tPHZ tPLZ tpd or tt 1 kΩ −− LOAD CIRCUIT CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF VCC Input 50% 50% 0V tPLH In-Phase Output 50% 10% tPHL 90% VOH 50% 10% V OL tf 90
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC241DWR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DW 20 2000 330.0 24.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.0 2.7 12.0 24.0 Q1 SN74HC241NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74HC241PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC241DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74HC241NSR SO NS 20 2000 367.0 367.0 45.0 SN74HC241PWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74HC241PWT TSSOP PW 20 250 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.