Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Latch D type, Addressable Standard SOIC 16 N

 

  

SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current Inverting Outputs Drive Up To

10 LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 14 ns

D ±4-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D 8-Bit Parallel-Out Storage Register

Performs Serial-to-Parallel Conversion With

Storage

D Asynchronous Parallel Clear

D Active-High Decoder

D Enable Input Simplifies Expansion

D Expandable for n-Bit Applications

D Four Distinct Functional Modes

description/ordering information

These 8-bit addressable latches are designed for

general-purpose storage applications in digital

systems. Specific uses include working registers,

serial-holding registers, and active-high decoders

or demultiplexers. They are multifunctional

devices capable of storing single-line data in eight

addressable latches and being a 1-of-8 decoder

or demultiplexer with active-high outputs.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 25 SN74HC259N SN74HC259N

Tube of 40 SN74HC259D

SOIC − D

Reel of 2500 SN74HC259DR

HC259

−40°C to 85°C

SOIC − D

Reel of 250 SN74HC259DT

HC259

−40 C to 85 C

SOP − NS Reel of 2000 SN74HC259NSR HC259

TSSOP − PW

Reel of 2000 SN74HC259PWR

HC259

TSSOP − PW

Reel of 250 SN74HC259PWT

HC259

CDIP − J Tube of 25 SNJ54HC259J SNJ54HC259J

−55°C to 125°C

CFP − W Tube of 150 SNJ54HC259W SNJ54HC259W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC259FK SNJ54HC259FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54HC259 ...J OR W PACKAGE

SN74HC259 . . . D, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

SN54HC259 . . . FK PACKAGE

(TOP VIEW)

CLR

GND

CLR

NC − No internal connection

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Summary of content (22 pages)

PAGE 1
SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 D D D D D D D D D D 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel Conversion With Storage Asynchronous Parallel Clear Active-High Decoder Enable Input Simplifies Expansion Expandable for n-Bit Applications Four Distinct Functional Modes SN54HC259 . . .
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SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 description/ordering information (continued) Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs. In the addressable-latch mode, data at the data-in terminal is written into the addressed latch. The addressed latch follows the data input, with all unaddressed latches remaining in their previous states.
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SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 logic diagram S0 D C 1 Q 4 Q0 R D C Q 5 Q1 R S1 D C 2 Q 6 Q2 R D C Q 7 Q3 R S2 3 D C Q 9 Q4 R D C Q 10 Q5 R G 14 D C Q 11 Q6 R D 13 D C Q 12 Q7 R CLR 15 Pin numbers shown are for the D, J, N, NS, PW, and W packages.
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SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 logic diagram, each internal latch (positive logic) C TG D C Q C C C C TG R C absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . .
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SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −20 µA VOH VI = VIH or VIL IOH = −4 mA IOH = −5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC VI = VCC or 0 VI = VCC or 0, IO = 0 Ci VCC MIN TA = 25°C TYP MAX SN54HC259 MIN MAX SN74HC259 MIN 2V 1.9 1.998 1.9 1.9 4.5 V 4.4 4.499 4.
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SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC259 SN74HC259 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 60 150 225 190 tPHL CLR Any Q 4.5 V 18 30 45 38 6V 14 26 38 32 Data tpd Address G Any Q Any Q Any Q tt Any MIN MIN MAX MIN MAX 2V 56 130 195 165 4.
PAGE 7
SCLS134E − DECEMBER 1982 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 50% 10% 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 90% tr th 90% tPHL Out-of-Phase Output 90% VOLT
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SN74HC259DR SOIC SN74HC259DRG4 SN74HC259NSR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 8.0 16.0 Q1 D 16 2500 330.0 16.8 6.5 10.3 2.1 SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC259DR SOIC D 16 2500 364.0 364.0 27.0 SN74HC259DRG4 SOIC D 16 2500 333.2 345.9 28.6 SN74HC259NSR SO NS 16 2000 367.0 367.0 38.0 SN74HC259PWR TSSOP PW 16 2000 367.0 367.0 35.0 SN74HC259PWT TSSOP PW 16 250 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.