Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Master rest Non-inverting TSSOP 20

 

  

 

SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D Outputs Can Drive Up To 10 LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 12 ns

D ±4-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Contain Eight Flip-Flops With Single-Rail

Outputs

D Direct Clear Input

D Individual Data Input to Each Flip-Flop

D Applications Include:

− Buffer/Storage Registers

− Shift Registers

− Pattern Generators

description

CLR

GND

CLK

SN54HC273 ...J OR W PACKAGE

SN74HC273 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

CLR

GND

CLK

SN54HC273 . . . FK PACKAGE

(TOP VIEW)

description/ordering information

These circuits are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HC273N SN74HC273N

SOIC − DW

Tube of 25 SN74HC273DW

HC273

SOIC − DW

Reel of 2000 SN74HC273DWR

HC273

−40°C to 85°C

SOP − NS Reel of 2000 SN74HC273NSR HC273

−40°C to 85°C

SSOP − DB Reel of 2000 SN74HC273DBR HC273

Tube of 70 SN74HC273PW

TSSOP − PW

Reel of 2000 SN74HC273PWR

HC273

TSSOP − PW

Reel of 250 SN74HC273PWT

HC273

CDIP − J Tube of 20 SNJ54HC273J SNJ54HC273J

−55°C to 125°C

CFP − W Tube of 85 SNJ54HC273W SNJ54HC273W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC273FK SNJ54HC273FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (24 pages)

PAGE 1
SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 D D D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 12 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Contain Eight Flip-Flops With Single-Rail Outputs D Direct Clear Input D Individual Data Input to Each Flip-Flop D Applications Include: − Buffer/Storage Registers − Shift Registers − Pattern Generato
PAGE 2
SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 description/ordering information (continued) Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not related directly to the transition time of the positive-going pulse.
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SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −20 µA VOH VI = VIH or VIL IOH = −4 mA IOH = −5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC VI = VCC or 0 VI = VCC or 0, IO = 0 Ci VCC MIN TA = 25°C TYP MAX SN54HC273 MIN MAX SN74HC273 MIN 2V 1.9 1.998 1.9 1.9 4.5 V 4.4 4.
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SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tPHL tpd CLR Any CLK Any tt Any VCC MIN TA = 25°C TYP MAX SN54HC273 MIN MAX SN74HC273 MIN 2V 5 11 4 4 4.5 V 27 50 18 21 6V 32 60 21 25 MAX UNIT MHz 2V 55 160 240 200 4.
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SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 50% 10% 90% tr th 90% tPHL Out-of-Phase Output 90%
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SCLS136D − DECEMBER 1982 − REVISED AUGUST 2003 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC273DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74HC273DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 SN74HC273DWRG4 SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC273DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74HC273DWR SOIC DW 20 2000 600.0 144.0 84.0 SN74HC273DWRG4 SOIC DW 20 2000 367.0 367.0 45.0 SN74HC273NSR SO NS 20 2000 367.0 367.0 45.0 SN74HC273PWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74HC273PWT TSSOP PW 20 250 367.0 367.0 38.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.