Datasheet

 
   
  
SCLS140D − DECEMBER 1982 − REVISED AUGUST 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State True Outputs Can
Drive Up To 15 LSTTL Loads
D Low Power Consumption, 80-µA Max I
CC
D Typical t
pd
= 13 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Eight High-Current Latches in a Single
Package
D Full Parallel Access for Loading
3212019
910111213
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D
V
8Q
4Q
GND
LE
SN54HC373 ...FK PACKAGE
(TOP VIEW)
CC
SN54HC373 ...J OR W PACKAGE
SN74HC373 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
description/ordering information
These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the ’HC373 devices are transparent D-type latches. While the latch-enable (LE) input is
high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that
were set up at the D inputs.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 20 SN74HC373N SN74HC373N
SOIC − DW
Tube of 25 SN74HC373DW
HC373
SOIC − DW
Reel of 2000 SN74HC373DWR
HC373
−40°C to 85°C
SOP − NS Reel of 2000 SN74HC373NSR HC373
−40°C to 85°C
SSOP − DB Reel of 2000 SN74HC373DBR HC373
Tube of 70 SN74HC373PW
TSSOP − PW
Reel of 2000 SN74HC373PWR
HC373
TSSOP − PW
Reel of 250 SN74HC373PWT
HC373
CDIP − J Tube of 20 SNJ54HC373J SNJ54HC373J
−55°C to 125°C
CFP − W Tube of 85 SNJ54HC373W SNJ54HC373W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC373FK SNJ54HC373FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
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