Datasheet

 
   
  
SCLS141E − DECEMBER 1982 − REVISED AUGUST 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State True Outputs Can
Drive Up To 15 LSTTL Loads
D Eight D-Type Flip-Flops in a Single Package
D Full Parallel Access for Loading
D Low Power Consumption, 80-µA Max I
CC
D Typical t
pd
= 14 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
3212019
910111213
4
5
6
7
8
18
17
16
15
14
8D
7D
7Q
6Q
6D
2D
2Q
3Q
3D
4D
1D
1Q
OE
5Q
5D
V
8Q
4Q
GND
CLK
SN54HC374 ...FK PACKAGE
(TOP VIEW)
CC
SN54HC374 ...J OR W PACKAGE
SN74HC374 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
description/ordering information
These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight flip-flops of the ’HC374 devices are edge-triggered D-type flip-flops. On the positive transition of the
clock (CLK) input, the Q outputs are set to the logic levels that were set up at the data (D) inputs.
An output-enable (OE
) input places the eight outputs in either a normal logic state (high or low logic levels) or
the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive bus lines without
interface or pullup components.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 20 SN74HC374N SN74HC374N
SOIC − DW
Tube of 25 SN74HC374DW
HC374
SOIC − DW
Reel of 2000 SN74HC374DWR
HC374
−40°C to 85°C
SOP − NS Reel of 2000 SN74HC374NSR HC374
−40 C to 85 C
SSOP − DB Reel of 2000 SN74HC374DBR HC374
TSSOP − PW
Tube of 2000 SN74HC374PWR
HC374
TSSOP − PW
Reel of 250 SN74HC374PWT
HC374
CDIP − J Tube of 20 SNJ54HC374J SNJ54HC374J
−55°C to 125°C
CFP − W Tube of 85 SNJ54HC374W SNJ54HC374W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC374FK SNJ54HC374FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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