Datasheet

 
   
SCLS143D − DECEMBER 1982 − REVISED JULY 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 80-µA Max I
CC
D Typical t
pd
= 13 ns
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Dual 4-Bit Binary Counters With Individual
Clocks
D Direct Clear for Each 4-Bit Counter
D Can Significantly Improve System
Densities by Reducing Counter Package
Count by 50 Percent
description/ordering information
The ’HC393 devices contain eight flip-flops and
additional gating to implement two individual 4-bit
counters in a single package. These devices
comprise two independent 4-bit binary counters,
each having a clear (CLR) and a clock (CLK)
input. N-bit binary counters can be implemented
with each package, providing the capability of
divide by 256. The ’HC393 devices have parallel
outputs from each counter stage so that any
submultiple of the input count frequency is
available for system timing signals.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 25 SN74HC393N SN74HC393N
Tube of 50 SN74HC393D
SOIC − D
Reel of 2500 SN74HC393DR
HC393
SOIC − D
Reel of 250 SN74HC393DT
HC393
−40°C to 85°C
SOP − NS Reel of 2000 SN74HC393NSR HC393
−40 C to 85 C
SSOP − DB Reel of 2000 SN74HC393DBR HC393
Tube of 90 SN74HC393PW
TSSOP − PW
Reel of 2000 SN74HC393PWR
HC393
TSSOP − PW
Reel of 250 SN74HC393PWT
HC393
CDIP − J Tube of 25 SNJ54HC393J SNJ54HC393J
−55°C to 125°C
CFP − W Tube of 150 SNJ54HC393W SNJ54HC393W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC393FK SNJ54HC393FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
3212019
910111213
4
5
6
7
8
18
17
16
15
14
2CLR
NC
2Q
A
NC
2Q
B
1Q
A
NC
1Q
B
NC
1Q
C
1CLR
1CLK
NC
V
2CLK
D
GND
NC
SN54HC393 . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
SN54HC393 ...J OR W PACKAGE
SN74HC393 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1CLK
1CLR
1Q
A
1Q
B
1Q
C
1Q
D
GND
V
CC
2CLK
2CLR
2Q
A
2Q
B
2Q
C
2Q
D
1Q
D
2Q
C
2Q
Copyright 2003, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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