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SN74HC4066

QUADRUPLE BILATERAL ANALOG SWITCH

SCLS325G – MARCH 1996 – REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Wide Operating Voltage Range of 2 V to 6 V

Typical Switch Enable Time of 18 ns

Low Power Consumption, 20-µA Max I

Low Input Current of 1 µA Max

High Degree of Linearity

High On-Off Output-Voltage Ratio

Low Crosstalk Between Switches

Low On-State Impedance ...

50-Ω TYP at V

= 6 V

Individual Switch Controls

description/ordering information

The SN74HC4066 is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital

signals. Each switch permits signals with amplitudes of up to 6 V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the

associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for

analog-to-digital and digital-to-analog conversion systems.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube of 25 SN74HC4066N SN74HC4066N

Tube of 50 SN74HC4066D

SOIC – D

Reel of 2500 SN74HC4066DR

HC4066

Reel of 250 SN74HC4066DT

–40°C to 85°C

SOP – NS Reel of 2000 SN74HC4066NSR HC4066

SSOP – DB Reel of 2000 SN74HC4066DBR HC4066

Tube of 90 SN74HC4066PW

TSSOP – PW

Reel of 2000 SN74HC4066PWR

HC4066

Reel of 250 SN74HC4066PWT

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

(each switch)

INPUT

CONTROL

(C)

SWITCH

L OFF

H ON

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

D, DB, N, NS, OR PW PACKAGE

(TOP VIEW)

Summary of content (21 pages)

PAGE 1
SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 D D D D D D D D D D, DB, N, NS, OR PW PACKAGE (TOP VIEW) Wide Operating Voltage Range of 2 V to 6 V Typical Switch Enable Time of 18 ns Low Power Consumption, 20-µA Max ICC Low Input Current of 1 µA Max High Degree of Linearity High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Low On-State Impedance . . .
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 logic diagram, each switch (positive logic) A VCC VCC B C One of Four Switches absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Control-input diode current, II (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . .
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 recommended operating conditions (see Note 3) VCC VI/O VIH MIN 2† Supply voltage I/O port voltage ∆t/∆v MAX 5 6 V VCC VCC V VCC VCC V 4.2 0 0.3 0 0.9 0 1.2 0 VCC = 2 V VCC = 4.5 V High-level input voltage, control inputs 1.5 3.15 VCC = 6 V VCC = 2 V VIL NOM Low-level input voltage, control inputs VCC = 4.5 V VCC = 6 V VCC = 2 V Input transition rise/fall time UNIT V 1000 500 VCC = 4.
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 switching characteristics over recommended operating free-air temperature range PARAMETER tPLH, tPHL Propagation P ti delay time tPZH, tPZL Switch S it h turn-on time tPLZ, tPHZ fI Switch S it h turn-off time Control input frequency Control feed-through noise FROM (INPUT) TO (OUTPUT) A or B B or A C C C C A or B TEST CONDITIONS CL = 50 pF F (see Figure 4) RL = 1 kΩ, CL = 50 pF (see Figure 5) A or B R
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC VC = VIH VCC VI = VCC VO (ON) GND + r on 1.0 mA V + 10 I–O –3 W – V VI–O Figure 1. On-State Resistance Test Circuit VCC VC = VIL VCC A A (OFF) B GND VS = VA – VB CONDITION 1: VA = 0, VB = VCC CONDITION 2: VA = VCC, VB = 0 Figure 2.
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC VC = VIH VCC A A B (ON) VCC Open GND VA = VCC TO GND Figure 3. On-State Leakage-Current Test Circuit VCC VC = VIH VCC VI VO (ON) 50 Ω 50 pF GND TEST CIRCUIT tr tf VI A or B 90% 50% 10% VCC 90% 50% 10% 0V tPLH VO B or A tPHL VOH 50% 50% VOL VOLTAGE WAVEFORMS Figure 4.
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC 50 Ω VC RL VO 1 kΩ VCC VI S2 S1 TEST S1 S2 tPZL tPZH tPLZ tPHZ GND VCC GND VCC VCC GND VCC GND CL 50 pF GND TEST CIRCUIT VCC VCC VC 50% 50% 0V 0V tPZH tPZL VOH VOH VO 50% 50% VOL VOL (tPZL, tPZH) VCC VCC VC 50% 50% 0V 0V tPHZ tPLZ VOH VOH VO VOL 10% 90% VOL (tPLZ, tPHZ) VOLTAGE WAVEFORMS Figure 5.
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SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC VCC 50 Ω VC VC 0V VCC VO VI = VCC GND CL 15 pF RL 1 kΩ VCC/2 Figure 6. Control-Input Frequency VCC 50 Ω tr VC VCC VCC VI GND Rin 600 Ω RL 600 Ω 90% 90% VC VO 10% 0V CL 50 pF tf 10% (f = 1 MHz) tr = tf = 6 ns VCC/2 VCC/2 Figure 7. Control Feed-Through Noise VCC VC = VCC 0.1 µF fin 50 Ω VI VCC (ON) GND VI VO RL 600 Ω CL 50 pF VCC/2 Figure 8.
PAGE 9
SN74HC4066 QUADRUPLE BILATERAL ANALOG SWITCH SCLS325G – MARCH 1996 – REVISED JULY 2003 PARAMETER MEASUREMENT INFORMATION VCC VC = VCC VCC (ON) VI fin 50 Ω 0.1 µF Rin 600 Ω VO1 GND RL 600 Ω CL 50 pF VCC/2 VI VCC VC = GND (VI = 0 dBm at f = 1 MHz) VCC (OFF) VO2 GND Rin 600 Ω RL 600 Ω CL 50 pF VCC/2 Figure 9. Crosstalk Between Any Two Switches VCC VC = GND 0.1 µF 50 Ω VCC (OFF) VI fin Rin 600 Ω VI VO RL 600 Ω GND VCC/2 CL 50 pF (VI = 0 dBm at f = 1 MHz) VCC/2 Figure 10.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 Orderable Device Status (1) Package Type Package Drawing SN74HC4066PWTG4 ACTIVE TSSOP PW Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HC4066DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74HC4066DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HC4066DT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC4066DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74HC4066DR SOIC D 14 2500 367.0 367.0 38.0 SN74HC4066DT SOIC D 14 250 367.0 367.0 38.0 SN74HC4066NSR SO NS 14 2000 367.0 367.0 38.0 SN74HC4066PWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74HC4066PWT TSSOP PW 14 250 367.0 367.0 35.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.