Datasheet
SCLS091D − DECEMBER 1982 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D Wide Operating Voltage Range of 2 V to 6 V
D Outputs Can Drive Up To 10 LSTTL Loads
D Low Power Consumption, 80-µA Max I
CC
D Typical t
pd
= 14 ns
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Full Decoding of Input Logic
D All Outputs Are High for Invalid BCD
Conditions
D Also for Applications as 3-Line to 8-Line
Decoders
3212019
910111213
4
5
6
7
8
18
17
16
15
14
B
C
NC
D
9
2
3
NC
4
5
1
0
NC
7
8
V
A
6
GND
NC
SN54HC42 ...FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
0
1
2
3
4
5
6
GND
V
CC
A
B
C
D
9
8
7
SN54HC42 ...J OR W PACKAGE
SN74HC42 . . . D, N, OR NS PACKAGE
(TOP VIEW)
description/ordering information
These decimal decoders consist of eight inverters and ten 4-input NAND gates. The inverters are connected
in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of valid input logic
ensures that all inputs remain off for all invalid input conditions.
ORDERING INFORMATION
T
A
PACKAGE
†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 25 SN74HC42N SN74HC42N
Tube of 40 SN74HC42D
−40°C to 85°C SOIC − D
Reel of 2500 SN74HC42DR
HC42
−40 C to 85 C
SOIC − D
Reel of 250 SN74HC42DT
HC42
SOP − NS Reel of 2000 SN74HC42NSR HC42
CDIP − J Tube of 25 SNJ54HC42J SNJ54HC42J
−55°C to 125°C
CFP − W Tube of 150 SNJ54HC42W SNJ54HC42W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC42FK SNJ54HC42FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
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