Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver PDIP 20

 

    

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SCLS007D − MARCH 1984 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current 3-State Outputs Drive Bus

Lines Directly or Up To 15 LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 8 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Data Flow-Through Pinout (All Inputs on

Opposite Side From Outputs)

description/ordering information

These octal buffers and line drivers feature the

performance of the popular ’HC240 series and

offer a pinout with inputs and outputs on opposite

sides of the package. This arrangement greatly

facilitates printed circuit board layout.

The 3-state control gate is a 2-input NOR. If either

output-enable (OE1

or OE2) input is high, all eight

outputs are in the high-impedance state. The

’HC540 devices provide inverted data at the

outputs.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HC540N SN74HC540N

SOIC − DW

Tube of 25 SN74HC540DW

HC540

SOIC − DW

Reel of 2000 SN74HC540DWR

HC540

−40°C to 85°C

SOP − NS Reel of 2000 SN74HC540NSR HC540

−40°C to 85°C

SSOP − DB Reel of 2000 SN74HC540DBR HC540

Tube of 70 SN74HC540PW

TSSOP − PW

Reel of 2000 SN74HC540PWR

HC540

TSSOP − PW

Reel of 250 SN74HC540PWT

HC540

CDIP − J Tube of 20 SNJ54HC540J SNJ54HC540J

−55°C to 125°C

CFP − W Tube of 85 SNJ54HC540W SNJ54HC540W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC540FK SNJ54HC540FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

OE1

GND

OE2

SN54HC540 ...J OR W PACKAGE

SN74HC540 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

OE1

OE2

GND

SN54HC540 . . . FK PACKAGE

(TOP VIEW)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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Summary of content (19 pages)

PAGE 1
SCLS007D − MARCH 1984 − REVISED AUGUST 2003 D D D D D Lines Directly or Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 8 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Data Flow-Through Pinout (All Inputs on Opposite Side From Outputs) SN54HC540 . . . J OR W PACKAGE SN74HC540 . . .
PAGE 2
SCLS007D − MARCH 1984 − REVISED AUGUST 2003 FUNCTION TABLE (each buffer/driver) INPUTS OE1 OE2 A OUTPUT Y L L L H L L H L H X X Z X H X Z logic diagram (positive logic) OE1 OE2 A1 1 19 2 18 Y1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
SCLS007D − MARCH 1984 − REVISED AUGUST 2003 recommended operating conditions (see Note 3) SN54HC540 VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO ∆t/∆v MIN NOM MAX 2 5 6 Input voltage MAX 2 5 6 3.15 3.15 4.2 4.2 0 VCC = 6 V UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition rise/fall time NOM 1.5 0 Output voltage MIN 1.
PAGE 4
SCLS007D − MARCH 1984 − REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC540 SN74HC540 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 35 100 149 125 tpd A Y 4.5 V 10 20 30 25 6V 8 17 25 21 ten OE tdis OE tt Y Y Y MIN MIN MAX MIN MAX 2V 75 150 224 188 4.
PAGE 5
SCLS007D − MARCH 1984 − REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION VCC PARAMETER Test Point From Output Under Test S1 tPZH ten RL CL (see Note A) 1 kΩ tPZL tPHZ tdis S2 RL tPLZ tpd or tt 1 kΩ −− LOAD CIRCUIT CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF VCC Input 50% 50% 0V tPLH In-Phase Output 50% 10% tPHL 90% VOH 50% 10% V OL tf 90%
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC540DWR Package Package Pins Type Drawing SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) DW 20 2000 330.0 24.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.8 13.0 2.7 12.0 24.0 Q1 SN74HC540NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74HC540PWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC540DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74HC540NSR SO NS 20 2000 367.0 367.0 45.0 SN74HC540PWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74HC540PWT TSSOP PW 20 250 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.