Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Receiver, transceiver SOIC 20

 

  

  

SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current 3-State Outputs Can Drive Up

To 15 LSTTL Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 12 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D True Logic

SN54HC645 ...J OR W PACKAGE

SN74HC645 ...DW, N, OR NS PACKAGE

(TOP VIEW)

SN54HC645 . . . FK PACKAGE

(TOP VIEW)

DIR

GND

3212019

10 11 12 13

DIR

GND

description/ordering information

These octal bus transceivers are designed for asynchronous two-way communication between data buses.

These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the

level at the direction-control (DIR) input. The output-enable (OE

) input can be used to disable the device so the

buses are effectively isolated.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – N Tube SN74HC645N SN74HC645N

40°Cto85°C

SOIC DW

Tube SN74HC645DW

HC645

–40°C to 85°C SOIC – DW

Tape and reel SN74HC645DWR

HC645

SOP – NS Tape and reel SN74HC645NSR HC645

CDIP – J Tube SNJ54HC645J SNJ54HC645J

–55°C to 125°C

CFP – W Tube SNJ54HC645W SNJ54HC645W

LCCC – FK Tube SNJ54HC645FK SNJ54HC645FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

INPUTS

OPERATION

OE DIR

OPERATION

L L B data to A bus

L H A data to B bus

H X Isolation

        

         

       

   

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

        

       

        

Summary of content (15 pages)

PAGE 1
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002 D Wide Operating Voltage Range of 2 V to 6 V D High-Current 3-State Outputs Can Drive Up D D D D To 15 LSTTL Loads D Low Power Consumption, 80-µA Max ICC Typical tpd = 12 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max True Logic 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 A2 A1 DIR VCC VCC OE B1 B2 B3 B4 B5 B6 B7 B8 A3 A4 A5 A6 A7 4 3 2 1 20 19 18 5
PAGE 2
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002 logic diagram (positive logic) OE DIR A1 19 1 2 18 B1 To Seven Other Transceivers absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . .
PAGE 3
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002 NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
PAGE 4
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002 switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX SN54HC645 SN74HC645 PARAMETER FROM (INPUT) TO (OUTPUT) VCC 2V 54 135 200 170 tpd d A or B B or A 4.5 V 18 27 40 34 6V 15 23 34 29 ten tt OE A or B A or B MIN MIN MAX MIN MAX 2V 150 270 405 335 4.
PAGE 5
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002 PARAMETER MEASUREMENT INFORMATION VCC PARAMETER Test Point From Output Under Test S1 tPZH ten RL CL (see Note A) 1 kΩ tPZL tPHZ tdis S2 RL tPLZ tpd or tt 1 kΩ –– LOAD CIRCUIT CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF VCC Input 50% 50% 0V tPLH In-Phase Output 50% 10% tPHL 90% VOH 50% 10% V OL tf 90%
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.com 28-Aug-2010 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC645DWR Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.0 2.7 12.0 24.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC645DWR SOIC DW 20 2000 367.0 367.0 45.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.