Datasheet

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SN54HC646, SN74HC646

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCLS150C – DECEMBER 1982 – REVISED MARCH 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Wide Operating Voltage Range of 2 V to 6 V

High-Current 3-State Outputs Can Drive Up

To 15 LSTTL Loads

Low Power Consumption, 80-µA Max I

Typical t

= 11 ns

±6-mA Output Drive at 5 V

Low Input Current of 1 µA Max

Independent Registers for A and B Buses

Multiplexed Real-Time and Stored Data

True Data Paths

14 15 16 17

SN54HC646 ...JT OR W PACKAGE

SN74HC646 . . . DW OR NT PACKAGE

(TOP VIEW)

SN54HC646 . . . FK PACKAGE

(TOP VIEW)

CLKAB

SAB

DIR

GND

CLKBA

SBA

4321 28

12 13

DIR

SAB

CLKAB

GND

CLKBA

SBA

27 26

NC – No internal connection

description/ordering information

The ’HC646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control

circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers.

Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB

or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed

with the ’HC646 devices.

Output-enable (OE

) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port may be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR

determines which bus receives data when OE is active (low). In the isolation mode (OE high), A data may be

stored in one register and/or B data may be stored in the other register.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – NT Tube SN74HC646NT SN74HC646NT

–40°C to 85°C

SOIC DW

Tube SN74HC646DW

HC646

SOIC

–

Tape and reel SN74HC646DWR

HC646

CDIP – JT Tube SNJ54HC646JT SNJ54HC646JT

–55°C to 125°C

CFP – W Tube SNJ54HC646W SNJ54HC646W

LCCC – FK Tube SNJ54HC646FK SNJ54HC646FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (15 pages)

PAGE 1
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 D D D D D D D Wide Operating Voltage Range of 2 V to 6 V High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 11 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data True Data Paths SN54HC646 . . . JT OR W PACKAGE SN74HC646 . . .
PAGE 2
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 description/ordering information (continued) To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. When an output function is disabled, the input function is still enabled and can be used to store data.
PAGE 3
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS 21 OE L 3 DIR L 1 23 CLKAB CLKBA X X 2 SAB X BUS B BUS A BUS A BUS B SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 22 SBA L 21 OE L 3 DIR H 3 DIR X X X 1 23 CLKAB CLKBA X ↑ X ↑ ↑ ↑ 2 SAB X X X 2 SAB L 22 SBA X BUS B BUS A BUS A 21 OE X X H 23 CLKBA X REAL-TIME TRANSFER BUS A TO BUS B BUS B REAL-TIME TRANSFER BUS B TO BUS A 1 CLKAB X 22 SBA X X X STORAGE FROM A, B, OR A AND B 21 OE L L 3 DIR L H 1 CLK
PAGE 4
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 logic diagram (positive logic) OE DIR CLKBA SBA CLKAB SAB 21 3 23 22 1 2 One of Eight Channels 1D C1 A1 4 20 B1 1D C1 To Seven Other Channels Pin numbers shown are for the DW, JT, NT, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 recommended operating conditions (see Note 4) SN54HC646 VCC VIH Supply voltage VCC = 2 V VCC = 4.5 V High-level input voltage VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage NOM MAX 2 5 6 MAX 2 5 6 3.15 3.15 4.2 4.2 0 UNIT V V 0.5 0.5 1.35 1.35 1.8 1.8 VCC VCC VCC = 2 V VCC = 4.5 V Input transition (rise and fall) time NOM 1.
PAGE 6
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC fclock tw tsu th Clock frequency Pulse duration, CLKBA or CLKAB high or low Setup time, A before CLKAB↑ ↑ or B before CLKBA↑ ↑ Hold time, A after CLKAB↑ ↑ or B after CLKBA↑ ↑ TA = 25°C MIN MAX POST OFFICE BOX 655303 MIN MAX SN74HC646 MIN MAX 2V 6 4.3 5.5 4.
PAGE 7
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) fmax CLKBA or CLKAB tpd A or B SBA or SAB† ten tdis ten tdis OE OE DIR DIR tt A or B B or A A or B A or B A or B A or B A or B Any VCC MIN TA = 25°C TYP MAX SN54HC646 MIN MAX SN74HC646 MIN
PAGE 8
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd TA = 25°C TYP MAX SN54HC646 SN74HC646 FROM (INPUT) TO (OUTPUT) VCC 2V 90 265 400 330 CLKBA or CLKAB A or B 4.
PAGE 9
SN54HC646, SN74HC646 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS SCLS150C – DECEMBER 1982 – REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test CL (see Note A) PARAMETER S1 Test Point tPZH ten RL 1 kΩ tPZL tPHZ tdis S2 RL 1 kΩ Data Input VCC 50% 10% 50% 50% 0V In-Phase Output 50% 10% tPHL 90% 90% tr tPHL Out-ofPhase Output 90% tf Closed Closed Open Open Open VCC th 90% 90% VCC 50% 10% 0 V tf 50% 10% Output Control (Low-Level Ena
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC646DWR Package Package Pins Type Drawing SOIC DW 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 15.7 2.7 12.0 24.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC646DWR SOIC DW 24 2000 367.0 367.0 45.
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