Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate OR gate 74HC PDIP 14

 

  

  

SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Wide Operating Voltage Range of 2 V to 6 V

D Operation From Very Slow Input

Transitions

D Same Pinouts as ’HC32

D Outputs Can Drive Up To 10 LSTTL Loads

D Low Power Consumption, 20-µA Max I

D Typical t

= 14 ns

D ±4-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Temperature-Compensated Threshold

Levels

D High Noise Immunity

description/ordering information

In these devices, each circuit functions as a

quadruple OR gate. They perform the Boolean

function

Y + A

• B or Y + A ) B

in positive

logic. However, because of the Schmitt action, the

inputs have different input threshold levels for

positive- and negative-going signals.

These circuits are temperature compensated and

can be triggered from the slowest of input ramps

and still give clean jitter-free output signals.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 25 SN74HC7032N SN74HC7032N

Tube of 50 SN74HC7032D

−40°C to 85°C SOIC − D

Reel of 2500 SN74HC7032DR

HC7032

−40 C to 85 C

SOIC − D

Reel of 250 SN74HC7032DT

HC7032

SOP − NS Reel of 2000 SN74HC7032NSR HC7032

CDIP − J Tube of 25 SNJ54HC7032J SNJ54HC7032J

−55°C to 125°C

CFP − W Tube of 150 SNJ54HC7032W SNJ54HC7032W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HC7032FK SNJ54HC7032FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A B

OUTPUT

H X H

X HH

L L L

    !"#$%&' #"'(' 

 ')"*%("' #$**&' ( ") +$,-#("' !(&. *"!$# #"')"*% "

+&#)#("' +&* & &*% ") &/( '*$%&' ('!(*! 0(**('1.

*"!$#"' +*"#&'2 !"& '" '&#&(*-1 '#-$!& &'2 ") (--

+(*(%&&*.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54HC7032 ...J OR W PACKAGE

SN74HC7032 . . . D, N, OR NS PACKAGE

(TOP VIEW)

SN54HC7032 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

GND

3212019

910111213

GND

Summary of content (12 pages)

PAGE 1
SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004 D Wide Operating Voltage Range of 2 V to 6 V D Operation From Very Slow Input D Transitions Same Pinouts as ’HC32 Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max ICC Typical tpd = 14 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Temperature-Compensated Threshold Levels High Noise Immunity 1A 1B 1Y 2A 2B 2Y GND 1 14 2 13 3 12 4 11 5 10 6 9
PAGE 2
SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004 logic diagram, each gate (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . .
PAGE 3
SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VT+ VT− MAX SN74HC7032 MIN MAX 2V 0.7 1.2 1.5 0.7 1.5 0.7 1.5 4.5 V 1.55 2.5 3.15 1.55 3.15 1.55 3.15 6V 2.1 3.3 4.2 2.1 4.2 2.1 4.2 2V 0.3 0.6 1 0.3 1 0.3 1 4.5 V 0.9 1.6 2.45 0.9 2.45 0.9 2.45 6V 1.2 2 3.
PAGE 4
SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004 PARAMETER MEASUREMENT INFORMATION From Output Under Test Test Point Input VCC 50% 50% 0V CL = 50 pF (see Note A) tPLH In-Phase Output LOAD CIRCUIT 50% 10% tPHL 90% 90% tr Input 50% 10% 90% 90% tr VCC 50% 10% 0 V tPHL Out-of-Phase Output 90% tf VOH 50% 10% VOL tf tPLH 50% 10% tf 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC7032DT Package Package Pins Type Drawing SOIC D 14 SPQ 250 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC7032DT SOIC D 14 250 367.0 367.0 38.
PAGE 9
PAGE 10
PAGE 11
PAGE 12
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.