Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate and inverter NAND gate 74HCT TSSOP 14

SN54HCT00, SN74HCT00

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SCLS062D – NOVEMBER 1988 – REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Operating Voltage Range of 4.5 V to 5.5 V

Outputs Can Drive Up To 10 LSTTL Loads

Low Power Consumption, 20-µA Max I

Typical t

= 10 ns

±4-mA Output Drive at 5 V

Low Input Current of 1 µA Max

Inputs Are TTL-Voltage Compatible

GND

SN54HCT00 ...J OR W PACKAGE

SN74HCT00 . . . D, DB, N, NS, OR PW PACKAGE

(TOP VIEW)

3212019

910111213

GND

SN54HCT00 . . . FK PACKAGE

(TOP VIEW)

NC – No internal connection

description/ordering information

These devices contain four independent 2-input NAND gates. They perform the Boolean function Y = A • B or

Y = A

+ B in positive logic.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

–40 C to 85 C

PDIP – N Tube of 25 SN74HCT00N SN74HCT00N

–40 C to 85 C

SOIC – D

Tube of 50 SN74HCT00D

HCT00

–40 C to 85 C

SOIC – D

Reel of 2500 SN74HCT00DR

HCT00

–40 C to 85 C

Reel of 250 SN74HCT00DT

–40

C to 85

SOP – NS Reel of 2000 SN74HCT00NSR HCT00

SSOP – DB Reel of 2000 SN74HCT00DBR HT00

TSSOP – PW

Tube of 90 SN74HCT00PW

HT00

TSSOP – PW

Reel of 2000 SN74HCT00PWR

HT00

Reel of 250 SN74HCT00PWT

–55 C to 125 C

CDIP – J Tube of 25 SNJ54HCT00J SNJ54HCT00J

–55

C to 125

CFP – W Tube of 150 SNJ54HCT00W SNJ54HCT00W

LCCC – FK Tube of 55 SNJ54HCT00FK SNJ54HCT00FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Summary of content (16 pages)

PAGE 1
SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS062D – NOVEMBER 1988 – REVISED AUGUST 2003 D D D Operating Voltage Range of 4.5 V to 5.5 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 20-µA Max ICC D D D D Typical tpd = 10 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible SN54HCT00 . . . J OR W PACKAGE SN74HCT00 . . .
PAGE 2
SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS062D – NOVEMBER 1988 – REVISED AUGUST 2003 FUNCTION TABLE (each gate) INPUTS OUTPUT Y A B H H L L X H X L H logic diagram (positive logic) A Y B absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.
PAGE 3
SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS062D – NOVEMBER 1988 – REVISED AUGUST 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VOH VI = VIH or VIL IOH = –20 µA IOH = –4 mA 4.5 V VOL VI = VIH or VIL IOL = 20 µA IOL = 4 mA 4.5 V II ICC VI = VCC or 0 VI = VCC or 0, ∆ICC† MIN MIN MAX SN74HCT00 MIN 4.4 4.499 4.4 4.4 4.3 3.7 3.84 5.5 V 4.5 V to 5.5 V MAX UNIT V 0.001 0.
PAGE 4
SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS062D – NOVEMBER 1988 – REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test 3V Test Point Input 1.3 V 1.3 V 0V CL = 50 pF (see Note A) tPLH In-Phase Output LOAD CIRCUIT 1.3 V 10% tPHL 90% 90% tr Input 1.3 V 0.3 V 2.7 V tPHL 3V 2.7 V 1.3 V 0.3 V 0 V tr Out-of-Phase Output 90% tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES VOH 1.3 V 10% V OL tf tPLH 1.3 V 10% tf 1.
PAGE 5
PACKAGE OPTION ADDENDUM www.ti.
PAGE 6
PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74HCT00PWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HCT00PWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 7
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HCT00DBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74HCT00DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74HCT00DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 8
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HCT00DBR SSOP DB 14 2000 367.0 367.0 38.0 SN74HCT00DR SOIC D 14 2500 333.2 345.9 28.6 SN74HCT00DR SOIC D 14 2500 367.0 367.0 38.0 SN74HCT00DT SOIC D 14 250 367.0 367.0 38.0 SN74HCT00NSR SO NS 14 2000 367.0 367.0 38.0 SN74HCT00PWR TSSOP PW 14 2000 367.0 367.0 35.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 16
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