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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

SN54HCT245

SN74HCT245

SCLS020F –MARCH 1984–REVISED AUGUST 2016

SNx4HCT245 Octal Bus Transceivers With 3-State Outputs

1 Features

• Operating Voltage Range of 4.5 V to 5.5 V

• High-Current 3-State Outputs Drive Bus Lines

Directly or up To 15-LSTTL Loads

• Low Power Consumption, 80-µA Maximum I

• Typical t

= 14 ns

• ±6-mA Output Drive at 5 V

• Low Input Current of 1 µA Maximum

• Inputs Are TTL-Voltage Compatible

2 Applications

• Factory Automation and Control

• Grid Infrastructure

• Electronic Point of Sale

• Multi-Function Printers

• Motor Drives

• Storage

• Telecom Infrastructure

3 Description

The SNx4HCT245 octal bus transceivers are

designed for asynchronous two-way communication

between data buses. The control-function

implementation minimizes external timing

requirements.

The SNx4HCT245 devices allow data transmission

from the A bus to the B bus or from the B bus to the

A bus, depending upon the logic level at the direction-

control (DIR) input. The output-enable (OE) input can

be used to disable the device so that the buses are

effectively isolated.

Device Information

(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

SN54HCT245J CDIP (20) 24.20 mm × 6.92 mm

SN54HCT245FK LCCC (20) 8.89 mm × 8.89 mm

SN54HCT245W CFP (20) 13.09 mm × 6.92 mm

SN74HCT245DW SOIC (20) 12.80 mm × 7.50 mm

SN74HCT245N PDIP (20) 24.33 mm × 6.35 mm

SN74HCT245NS SOP (20) 12.60 mm × 5.30 mm

SN74HCT245PW TSSOP (20) 6.50 mm × 4.40 mm

SN74HCT245DB SSOP (20) 7.80 mm × 7.20 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

Logic Diagram (Positive Logic)

Summary of content (31 pages)

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Sample & Buy Product Folder Technical Documents Support & Community Tools & Software SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 SNx4HCT245 Octal Bus Transceivers With 3-State Outputs 1 Features 3 Description • • The SNx4HCT245 octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. 1 • • • • • Operating Voltage Range of 4.5 V to 5.
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications...............................
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 5 Pin Configuration and Functions SN54HCT245 . . . J OR W PACKAGE SN74HCT245 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 A3 A4 A5 A6 A7 OE A2 A1 DIR VCC SN54HCT245 . . .
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage (2) MIN MAX UNIT –0.
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 6.4 Thermal Information SNx4HCT245 THERMAL METRIC (1) J (CDIP) W (CFP) 20 PINS 20 PINS FK DB (LCCC) (SSOP) DW (SOIC) N (PDIP) NS (SO) PW (TSS OP) 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS 20 PINS UNIT RθJA Junction-to-ambient thermal resistance — — — 84.6 70.4 43.4 68.9 94.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 38.7 60.8 37.1 44.3 36.5 29.5 34.7 30.
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com 6.6 Switching Characteristics: CL = 50 pF over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC TEST CONDITIONS MIN TA = 25°C 4.5 V tpd A or B B or A ten OE 16 22 33 SN74HCT245 28 14 30 SN74HCT245 25 25 SN54HCT245 22 SN54HCT245 OE 26 SN54HCT245 50 TA = 25°C 5.
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 6.7 Switching Characteristics: CL = 150 pF over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC TEST CONDITIONS MIN TA = 25°C 4.5 V tpd A or B B or A ten OE 20 30 45 SN74HCT245 38 18 41 SN74HCT245 34 36 SN54HCT245 30 SN54HCT245 67 TA = 25°C tt 17 SN54HCT245 53 TA = 25°C 5.
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com 7 Parameter Measurement Information VCC From Output Under Test CL (see Note A) PARAMETER S1 Test Point tPZH ten RL 1 kΩ tPZL tPHZ tdis S2 RL tPLZ 1 kΩ –– tpd or tt LOAD CIRCUIT 2.7 V Input 1.3 V 0.3 V 2.7 V CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF 3V 1.3 V 0.3 V 0 V tr tf VOLTAGE WAVEFORM INPUT RISE AND FALL TIMES 3V Input 1.
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 8 Detailed Description 8.1 Overview The SNx4HCT245 is a bidirectional buffer with direction control and active low output enable. This device is commonly used in logic systems for isolation and increasing drive strength. 8.2 Functional Block Diagram DIR 1 19 A1 OE 2 18 B1 To Seven Other Channels Copyright © 2016, Texas Instruments Incorporated Figure 3. Logic Diagram (Positive Logic) 8.
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 Typical Application (continued) 9.2.3 Application Curve It is common to see significant losses in ribbon cables and back planes. The plot shown in Figure 5 is a simplified simulation of a ribbon cable from a 5-V, 10-MHz low drive strength source. It shows the difference between an input signal from a weak driver like an MCU or FPGA compared to a strong driver like the SN74HCT245 when measured at the distant end of the cable.
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SN54HCT245, SN74HCT245 SCLS020F – MARCH 1984 – REVISED AUGUST 2016 www.ti.com 10 Power Supply Recommendations The power supply can be any voltage between the MIN and MAX supply voltage rating located in the Recommended Operating Conditions. Each VCC pin must have a good bypass capacitor to prevent power disturbance. For devices with a single supply, 0.1 µF is recommended; if there are multiple VCC pins, then 0.01 µF or 0.022 µF is recommended for each power pin.
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SN54HCT245, SN74HCT245 www.ti.com SCLS020F – MARCH 1984 – REVISED AUGUST 2016 12 Device and Documentation Support 12.1 Documentation Support 12.1.1 Related Documentation For related documentation see the following: Implications of Slow or Floating CMOS Inputs (SCBA004) 12.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 2.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 17-Dec-2015 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74HCT245DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74HCT245DWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.0 Q1 SN74HCT245NSR SO NS 20 2000 330.0 24.4 9.0 13.0 2.4 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HCT245DBR SN74HCT245DWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74HCT245NSR SO NS 20 2000 367.0 367.0 45.0 SN74HCT245PWR TSSOP PW 20 2000 364.0 364.0 27.0 SN74HCT245PWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74HCT245PWT TSSOP PW 20 250 367.0 367.0 38.
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PACKAGE OUTLINE DW0020A SOIC - 2.65 mm max height SCALE 1.200 SOIC C 10.63 TYP 9.97 SEATING PLANE PIN 1 ID AREA A 0.1 C 20 1 13.0 12.6 NOTE 3 18X 1.27 2X 11.43 10 11 B 7.6 7.4 NOTE 4 20X 0.51 0.31 0.25 C A B 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0 -8 0.3 0.1 1.27 0.40 DETAIL A TYPICAL 4220724/A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2.
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EXAMPLE BOARD LAYOUT DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM (R0.05) TYP 10 11 (9.3) LAND PATTERN EXAMPLE SCALE:6X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4220724/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7.
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EXAMPLE STENCIL DESIGN DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM 11 10 (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4220724/A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.