Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Standard Three-state, Non-inverting DIP 20

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  

SCLS177E − MARCH 1984 − REVISED AUGUST 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Operating Voltage Range of 4.5 V to 5.5 V

D High-Current 3-State Noninverting Outputs

Drive Bus Lines Directly or Up To 15 LSTTL

Loads

D Low Power Consumption, 80-µA Max I

D Typical t

= 22 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Inputs Are TTL-Voltage Compatible

D Bus-Structured Pinout

description/ordering information

These octal edge-triggered D-type flip-flops

feature 3-state outputs designed specifically for

bus driving. The ’HCT574 devices are particularly

suitable for implementing buffer registers, I/O

ports, bidirectional bus drivers, and working

registers.

The eight flip-flops enter data on the low-to-high

transition of the clock (CLK) input.

A buffered output-enable (OE

) input can be used

to place the eight outputs in either a normal logic

state (high or low logic levels) or the

high-impedance state. In the high-impedance

state, the outputs neither load nor drive the bus

lines significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without interface or pullup components.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 20 SN74HCT574N SN74HCT574N

SOIC − DW

Tube of 25 SN74HCT574DW

HCT574

SOIC − DW

Reel of 2000 SN74HCT574DWR

HCT574

−40°C to 85°C

SOP − NS Reel of 2000 SN74HCT574NSR HCT574

−40°C to 85°C

SSOP − DB Reel of 2000 SN74HCT574DBR HT574

Tube of 70 SN74HCT574PW

TSSOP − PW

Reel of 2000 SN74HCT574PWR

HT574

TSSOP − PW

Reel of 250 SN74HCT574PWT

HT574

CDIP − J Tube of 20 SNJ54HCT574J SNJ54HCT574J

−55°C to 125°C

CFP − W Tube of 85 SNJ54HCT574W SNJ54HCT574W

−55 C to 125 C

LCCC − FK Tube of 55 SNJ54HCT574FK SNJ54HCT574FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

3212019

910111213

GND

CLK

SN54HCT574 . . . FK PACKAGE

(TOP VIEW)

SN54HCT574 ...J OR W PACKAGE

SN74HCT574 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

GND

CLK

Summary of content (12 pages)

PAGE 1
SCLS177E − MARCH 1984 − REVISED AUGUST 2003 D D D D D D Drive Bus Lines Directly or Up To 15 LSTTL Loads Low Power Consumption, 80-µA Max ICC Typical tpd = 22 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Inputs Are TTL-Voltage Compatible Bus-Structured Pinout SN54HCT574 . . . J OR W PACKAGE SN74HCT574 . . .
PAGE 2
SCLS177E − MARCH 1984 − REVISED AUGUST 2003 description/ordering information (continued) OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
PAGE 3
SCLS177E − MARCH 1984 − REVISED AUGUST 2003 recommended operating conditions (see Note 3) SN54HCT574 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO ∆t/∆v Output voltage 0 High-level input voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V SN74HCT574 2 2 Input transition rise/fall time V V 0.8 VCC VCC UNIT 0 0 500 0.
PAGE 4
SCLS177E − MARCH 1984 − REVISED AUGUST 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax tpd CLK Any Q ten OE Any Q tdis OE Any Q tt Any Q TA = 25°C TYP MAX SN54HCT574 SN74HCT574 VCC MIN 4.5 V 30 36 20 24 5.5 V 33 40 22 27 MIN MAX MIN MAX UNIT MHz 4.5 V 30 36 54 45 5.
PAGE 5
SCLS177E − MARCH 1984 − REVISED AUGUST 2003 PARAMETER MEASUREMENT INFORMATION VCC ten RL tdis CL (see Note A) RL tPZH S1 Test Point From Output Under Test PARAMETER S2 1 kΩ tPZL tPHZ tPLZ tpd or tt 1 kΩ CL S1 S2 50 pF or 150 pF Open Closed Closed Open Open Closed Closed Open Open Open 50 pF 50 pF or 150 pF −− LOAD CIRCUIT 3V High-Level Pulse 1.3 V 3V Reference Input 1.3 V 0V 1.
PAGE 6
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 10
MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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