Datasheet

SN54HCT623, SN74HCT623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS016C – MARCH 1984 – REVISED MARCH 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Operating Voltage Range of 4.5 V to 5.5 V
Low Power Consumption, 80-µA Max I
CC
Typical t
pd
= 11 ns
±6-mA Output Drive at 5 V
Low Input Current of 1 µA Max
Inputs Are TTL-Voltage Compatible
Lock Bus-Latch Capability
True Logic
High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
SN54HCT623 ...J OR W PACKAGE
SN74HCT623 . . . DW OR N PACKAGE
(TOP VIEW)
SN54HCT623 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
3212019
910111213
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A2
A1
OEAB
B7
B6
V
OEBA
A8
GND
B8
CC
description/ordering information
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The
control-function implementation allows for maximum flexibility in timing.
The ’HCT623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus,
depending upon the logic levels at the output-enable (OEAB and OEBA) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable
configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA
.
Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA
are enabled and
all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total)
remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
To ensure the high-impedance state during power up or power down, OEBA
should be tied to V
CC
through a
pullup resistor and OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor
is determined by the current-sinking/current-sourcing capability of the driver.
ORDERING INFORMATION
T
A
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
40°Cto85°C
PDIP – N Tube SN74HCT623N SN74HCT623N
40°C
to
85°C
SOIC – DW Tube SN74HCT623DW HCT623
CDIP – J Tube SNJ54HCT623J SNJ54HCT623J
–55°C to 125°C
CFP – W Tube SNJ54HCT623W SNJ54HCT623W
LCCC – FK Tube SNJ54HCT623FK SNJ54HCT623FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright 2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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