Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver TSSOP 20

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN74LV244A . . . DB, DGV, DW, NS

OR PW PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54LV244A . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2

2OE

2Y1

GND

2A1

SN74LV244A . . . RGY PACKAGE

(TOP VIEW)

1 20

10 11

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

1OE

2A1

GND

SN54LV244A . . . J OR W PACKAGE

SN54LV244A

SN74LV244A

www.ti.com

SCLS383M –SEPTEMBER 1997–REVISED JULY 2013

OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

Check for Samples: SN54LV244A, SN74LV244A

FEATURES

• 2-V to 5.5-V V

Operation • I

off

Supports Partial-Power-Down Mode

Operation

• Max t

of 6.5 ns at 5 V

• Latch-Up Performance Exceeds 250 mA Per

• Typical V

OLP

(Output Ground Bounce)

JESD 17

<0.8 V at V

= 3.3 V, T

= 25°C

• ESD Protection Exceeds JESD 22

• Typical V

OHV

(Output V

Undershoot)

>2.3 V at V

= 3.3 V, T

= 25°C – 2000-V Human-Body Model (A114-A)

• Support Mixed-Mode Voltage Operation on All – 200-V Machine Model (A115-A)

Ports

– 1000-V Charged-Device Model (C101)

DESCRIPTION

These octal buffers/line drivers are designed for 2-V to 5.5-V VCC operation.

The ’LV244A devices are designed specifically to improve both the performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented receivers and transmitters.

These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,

the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-

impedance state.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the

outputs, preventing damaging current backflow through the devices when they are powered down.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
SN54LV244A SN74LV244A www.ti.
PAGE 2
SN54LV244A SN74LV244A SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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SN54LV244A SN74LV244A www.ti.com SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 RECOMMENDED OPERATING CONDITIONS (1) SN54LV244A (2) VCC Supply voltage VIH High-level input voltage SN74LV244A MIN MAX 2 5.5 MIN MAX 2 5.5 1.5 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 VCC x 0.7 VCC x 0.7 VCC x 0.7 VIL Low-level input voltage VO Input voltage Output voltage 0.5 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 IOH High-level output current 5.5 0 5.5 High or low state 0 VCC 0 VCC 3-state 0 5.
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SN54LV244A SN74LV244A SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = –55°C to 125°C TA = –40°C to 85°C SN54LV244A (1) SN74LV244A MIN VOH VOL IOH = –50 μA 2 V to 5.5 V IOH = –2 mA 2.3 V IOH = –8 mA IOH = 16 mA MAX MIN TYP Recommended UNIT SN74LV244A MAX MIN VCC – 0.1 VCC – 0.1 VCC – 0.1 2 2 2 3V 2.48 2.48 2.48 4.5 V 3.8 3.
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SN54LV244A SN74LV244A www.ti.com SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A Y ten OE Y tdis OE tpd A ten OE Y tdis OE Y PARAMETER LOAD CAPACITANCE TA = 25°C TA = –40°C TO 85°C SN54LV244A (1) SN74LV244A TA = –40°C TO 125°C Recommended TYP MAX MIN MAX MIN MAX MIN 8.4 (2) 1 (2) 10 (2) 1 10 1 10 6.
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SN54LV244A SN74LV244A SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 www.ti.
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SN54LV244A SN74LV244A www.ti.com SCLS383M – SEPTEMBER 1997 – REVISED JULY 2013 REVISION HISTORY Changes from Revision L (August 2010) to Revision M Page • Changed document format from Quicksilver to DocZone. .................................................................................................... 1 • Extended operating temperature range to 125°C .................................................................................................................
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
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PACKAGE MATERIALS INFORMATION www.ti.com 5-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74LV244ADBR SSOP DB 20 2000 330.0 16.4 SN74LV244ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV244ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 5-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV244ADBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LV244ADGVR TVSOP DGV 20 2000 367.0 367.0 35.0 SN74LV244ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LV244ANSR SO NS 20 2000 367.0 367.0 45.0 SN74LV244APWR TSSOP PW 20 2000 364.0 364.0 27.0 SN74LV244APWRG3 TSSOP PW 20 2000 364.0 364.0 27.
PAGE 13
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 23
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.