Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsInterface ICsInterface IC - multiplexers, demultiplexers PDIP 16

SN54LV4053A, SN74LV4053A

TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS

SCLS430K − MAY 1999 − REVISED APRIL 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 2-V to 5.5-V V

Operation

D Support Mixed-Mode Voltage Operation on

All Ports

D High On-Off Output-Voltage Ratio

D Low Crosstalk Between Switches

D Individual Switch Controls

D Extremely Low Input Current

D Latch-Up Performance Exceeds 250 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

These triple 2-channel CMOS analog

multiplexers/demultiplexers are designed for 2-V

to 5.5-V V

operation.

The ’LV4053A devices handle both analog and

digital signals. Each channel permits signals with

amplitudes up to 5.5 V (peak) to be transmitted in

either direction.

Applications include signal gating, chopping,

modulation or demodulation (modem), and signal

multiplexing for analog-to-digital and

digital-to-analog conversion systems.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP − N Tube of 25 SN74LV4053AN SN74LV4053AN

QFN − RGY Reel of 1000 SN74LV4053ARGYR LW053A

SOIC D

Tube of 40 SN74LV4053AD

LV4053A

SOIC − D

Reel of 2500 SN74LV4053ADR

LV4053A

40°Cto85°C

SOP − NS Reel of 2000 SN74LV4053ANSR 74LV4053A

−40°C to 85°C

SSOP − DB Reel of 2000 SN74LV4053ADBR LW053A

Tube of 90 SN74LV4053APW

TSSOP − PW

Reel of 2000 SN74LV4053APWR

LW053A

TSSOP

Reel of 250 SN74LV4053APWT

LW053A

TVSOP − DGV Reel of 2000 SN74LV4053ADGVR LW053A

55°C to 125°C

CDIP − J Tube of 25 SNJ54LV4053AJ SNJ54LV4053AJ

−55°C to 125°C

CFP − W Tube of 150 SNJ54LV4053AW SNJ54LV4053AW

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Y1

2Y0

3Y1

3-COM

3Y0

INH

GND

2-COM

1-COM

1Y1

1Y0

SN54LV4053A ...J OR W PACKAGE

SN74LV4053A . . . D, DB, DGV, N, NS, OR PW PACKAGE

(TOP VIEW)

SN74LV4053A . . . RGY PACKAGE

(TOP VIEW)

116

2-COM

1-COM

1Y1

1Y0

2Y0

3Y1

3-COM

3Y0

INH

GND

2Y1

GND

Summary of content (26 pages)

PAGE 1
SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 2Y1 2Y0 3Y1 3-COM 3Y0 INH GND GND 15 3 14 4 13 5 12 6 11 7 10 8 9 2Y0 3Y1 3-COM 3Y0 INH GND VCC 2-COM 1-COM 1Y1 1Y0 A B C 1 16 2 15 3 14 4 13 5 12 6 11 10 7 8 Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
PAGE 2
SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 FUNCTION TABLE INPUTS B A ON CHANNELS INH C L L L L 1Y0, 2Y0, 3Y0 L L L H 1Y1, 2Y0, 3Y0 L L H L 1Y0, 2Y1, 3Y0 L L H H 1Y1, 2Y1, 3Y0 L H L L 1Y0, 2Y0, 3Y1 L H L H 1Y1, 2Y0, 3Y1 L H H L 1Y0, 2Y1, 3Y1 L H H H 1Y1, 2Y1, 3Y1 H X X X None logic diagram (positive logic) 15 14 A 12 2 2 1Y1 2Y0 2Y1 9 5 3 INH 1Y0 10 1 C 1-COM 11 13 B 2-
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS PARAMETER VCC TA = 25°C MIN SN54LV4053A TYP MAX MIN MAX SN74LV4053A MIN MAX IT = 2 mA,, VI = VCC or GND, VINH = VIL (see Figure 1) 2.3 V 41 180 225 225 3V 30 150 190 190 4.5 V 23 75 100 100 IT = 2 mA, VI = VCC to GND, VINH = VIL 2.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM TA = 25°C MIN SN54LV4053A MIN MAX SN74LV4053A MIN MAX UNIT TYP MAX CL = 15 pF (see Figure 4) 1.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 analog switch characteristics FROM (INPUT) PARAMETER Frequency response (switch on) COM or Yn Crosstalk (between any switches) Feedthrough attenuation (switch off) TEST CONDITIONS Yn or COM COM or Yn Crosstalk (control input to signal output) Sine-wave distortion TO (OUTPUT) Yn or COM INH COM or Yn COM or Yn Yn or COM COM or Yn Yn or COM VCC TA = 25°C TYP CL = 50 pF, p
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = VIH VCC A VI VO (OFF) GND Condition 1: VI = 0, VO = VCC Condition 2: VI = VCC, VO = 0 Figure 2. Off-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC A VI Open (ON) GND VI = VCC or GND Figure 3. On-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC Input Output (ON) 50 Ω GND CL Figure 4.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC 50 Ω VINH VCC VI S1 VO GND 1 kΩ TEST S1 S2 tPLZ/tPZL tPHZ/tPZH GND VCC VCC GND S2 CL TEST CIRCUIT VCC VCC VINH 50% 50% 0V 0V tPZL tPZH ≈VCC VOH VO 50% 50% VOL ≈0 V (tPZL, tPZH) VCC VCC VINH 50% 50% 0V 0V tPLZ tPHZ ≈VCC VOH VO VOL + 0.3 V VOL (tPLZ, tPHZ) VOH − 0.3 V ≈0 V VOLTAGE WAVEFORMS Figure 5.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = GND VCC fin VO1 (ON) 0.1 μF 600 Ω 50 Ω GND RL CL VCC/2 VCC VINH = VCC VCC fin (OFF) VO2 GND 600 Ω RL CL VCC/2 Figure 7. Crosstalk Between Any Two Switches 50 Ω VCC VINH VCC VO GND 600 Ω RL VCC/2 CL VCC/2 Figure 8. Crosstalk Between Control Input and Switch Output VCC VINH = VCC 0.
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SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = GND 10 μF fin 10 μF VCC VO (ON) 600 Ω GND RL VCC/2 Figure 10.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PAGE 14
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.6 2.5 12.0 16.0 Q1 SN74LV4053ADBR SSOP DB 16 2000 330.0 16.4 8.2 SN74LV4053ADGVR TVSOP DGV 16 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LV4053ADR SOIC D 16 2500 330.0 16.8 6.5 10.3 2.1 8.0 16.
PAGE 15
PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV4053ADBR SSOP DB 16 2000 367.0 367.0 38.0 SN74LV4053ADGVR TVSOP DGV 16 2000 367.0 367.0 35.0 SN74LV4053ADR SOIC D 16 2500 364.0 364.0 27.0 SN74LV4053ADRG4 SOIC D 16 2500 333.2 345.9 28.6 SN74LV4053ANSR SO NS 16 2000 367.0 367.0 38.0 SN74LV4053APWR TSSOP PW 16 2000 364.0 364.0 27.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.