Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Preset/reset Differential SOIC 14

SN54LV74A, SN74LV74A

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

SCLS381L − AUGUST 1997 − REVISED APRIL 2005

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D 2-V to 5.5-V V

Operation

D Max t

of 8.5 ns at 5 V

D Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C

D Typical V

OHV

(Output V

Undershoot)

>2.3 V at V

= 3.3 V, T

= 25°C

D Support Mixed-Mode Voltage Operation on

All Ports

D I

off

Supports Partial-Power-Down Mode

Operation

D Latch-Up Performance Exceeds 250 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

1CLR

1CLK

1PRE

GND

2CLR

2CLK

2PRE

SN54LV74A ...J OR W PACKAGE

SN74LV74A ...D, DB, DGV, NS,

OR PW PACKAGE

(TOP VIEW)

3212019

910111213

2CLK

2PRE

1CLK

1PRE

1CLR

2CLR

GND

SN54LV74A . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

SN74LV74A . . . RGY PACKAGE

(TOP VIEW)

114

2CLR

2CLK

2PRE

1CLK

1PRE

1CLR

GND

description/ordering information

These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V V

operation.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGY Reel of 1000 SN74LV74ARGYR LV74A

SOIC D

Tube of 50 SN74LV74AD

LV74A

SOIC − D

Reel of 2500 SN74LV74ADR

LV74A

SOP − NS Reel of 2000 SN74LV74ANSR 74LV74A

−40°C to 85°C

SSOP − DB Reel of 2000 SN74LV74ADBR LV74A

40 C

85 C

Tube of 90 SN74LV74APW

TSSOP − PW

Reel of 2000 SN74LV74APWR

LV74A

TSSOP

Reel of 250 SN74LV74APWT

LV74A

TVSOP − DGV Reel of 2000 SN74LV74ADGVR LV74A

CDIP − J Tube of 25 SNJ54LV74AJ SNJ54LV74AJ

−55°C to 125°C

CFP − W Tube of 150 SNJ54LV74AW SNJ54LV74AW

55 C

125 C

LCCC − FK Tube of 55 SNJ54LV74AFK SNJ54LV74AFK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (23 pages)

PAGE 1
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP (Output Ground Bounce) SN54LV74A . . . J OR W PACKAGE SN74LV74A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q 1D 1CLK 1PRE 1Q 1Q 14 1D 1CLR NC VCC 2CLR 1 2 13 2CLR 3 12 2D 4 11 2CLK 5 10 2PRE 9 2Q 6 7 8 SN54LV74A . . .
PAGE 2
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 description/ordering information (continued) A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse.
PAGE 3
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.
PAGE 4
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 recommended operating conditions (see Note 5) SN54LV74A VCC MIN MAX 2 5.5 Supply voltage VCC = 2 V VIH High level input voltage High-level 1.5 Low level input voltage Low-level VI Input voltage VO Output voltage VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7 Input transition rise or fall rate TA Operating free-air temperature V V 0.5 0.5 VCC × 0.
PAGE 5
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) TA = 25°C PARAMETER tw Pulse duration tsu Setup time before CLK↑ th Hold time, data after CLK↑ MIN SN54LV74A MAX MIN MAX SN74LV74A MIN PRE or CLR low 8 9 9 CLK 8 9 9 Data 8 9 9 PRE or CLR inactive 7 7 7 0.5 0.5 0.
PAGE 6
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 switching characteristics over recommended operating VCC = 3.3 V ± 0.
PAGE 7
SN54LV74A, SN74LV74A DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS SCLS381L − AUGUST 1997 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test Test Point RL = 1 kΩ From Output Under Test CL (see Note A) S1 Open TEST GND S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain CL (see Note A) Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input 0V tw tsu VCC 50% VCC 50% VCC Input th VCC 50% VCC D
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 18-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LV74ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74LV74ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LV74ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV74ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74LV74ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74LV74ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LV74APWR TSSOP PW 14 2000 364.0 364.0 27.0 SN74LV74APWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74LV74APWRG4 TSSOP PW 14 2000 367.0 367.0 35.
PAGE 13
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 23
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