Datasheet

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SN74LVC07A

www.ti.com

SCAS595T –OCTOBER 1997– REVISED FEBRUARY 2011

HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS

Check for Samples: SN74LVC07A

FEATURES

• Operates From 1.65 V to 5 V • Max t

of 2.6 ns at 5 V

• Inputs and Open-Drain Outputs Accept • Latch-Up Performance Exceeds 250 mA Per

Voltages up to 5.5 V JESD 17

DESCRIPTION/ORDERING INFORMATION

This hex buffer/driver is designed for 1.65-V to 5.5-V V

operation.

The outputs of the SN74LVC07A device are open drain and can be connected to other open-drain outputs to

implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA.

Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use of

this device as translators in a mixed-system environment.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

QFN – RGY Reel of 1000 SN74LVC07ARGYR LC07A

Tube of 50 SN74LVC07AD

SOIC – D Reel of 2500 SN74LVC07ADRG3 LVC07A

Reel of 250 SN74LVC07ADT

SOP – NS Reel of 2000 SN74LVC07ANSR LVC07A

–40°C to 85°C

SSOP – DB Reel of 2000 SN74LVC07ADBR LC07A

Tube of 90 SN74LVC07APW

TSSOP – PW Reel of 2000 SN74LVC07APWRG3 LC07A

Reel of 250 SN74LVC07APWT

TVSOP – DGV Reel of 2000 SN74LVC07ADGVR LC07A

(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (23 pages)

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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com HEX BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS Check for Samples: SN74LVC07A FEATURES 1 • • Operates From 1.65 V to 5 V Inputs and Open-Drain Outputs Accept Voltages up to 5.5 V • • Max tpd of 2.6 ns at 5 V Latch-Up Performance Exceeds 250 mA Per JESD 17 DESCRIPTION/ORDERING INFORMATION This hex buffer/driver is designed for 1.65-V to 5.5-V VCC operation.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS (1) VCC Supply voltage High-level input voltage MAX 5.5 VCC = 2.3 V to 2.7 V 1.7 VCC = 2.7 V to 3.6 V 2 Low-level input voltage V VCC = 4.5 V to 5.5 V 0.7 × VCC V 0.35 × VCC VCC = 1.65 V to 1.95 V VIL UNIT 0.65 × VCC VCC = 1.65 V to 1.95 V VIH MIN 1.65 VCC = 2.3 V to 2.7 V 0.7 VCC = 2.7 V to 3.6 V 0.8 VCC = 4.5 V to 5.5 V 0.3 × VCC V VI Input voltage 0 5.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC = 1.8 V ± 0.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V ± 0.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC = 2.7 and 3.3 V ± 0.3 V 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPZL (see Note F) 6V tPLZ (see Note G) 6V tPHZ/tPZH 6V LOAD CIRCUIT tw 2.7 V 2.7 V Timing Input 0V 0V 2.7 V 1.5 V 1.5 V 0V 1.5 V Output Control (low-level enabling) 2.7 V 1.5 V 1.5 V 0V tPLH tPLZ Output Waveform 1 S1 at 6 V (see Note B) 3V 1.5 V 3V 1.5 V 1.
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SN74LVC07A SCAS595T – OCTOBER 1997 – REVISED FEBRUARY 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION VCC = 5 V ± 0.5 V 2 x VCC 500 Ω 2 x VCC 2 x VCC 500 Ω 2 x VCC Output Waveform 1 S1 at 2 x VCC (see Note B) Output Waveform 2 S1 at 2 x VCC (see Note B) 0.3 V NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal connections such that the output is low, except when disabled by the output control.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVC07ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74LVC07ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LVC07ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC07ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74LVC07ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74LVC07ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC07ADR SOIC D 14 2500 364.0 364.0 27.0 SN74LVC07ADR SOIC D 14 2500 333.2 345.9 28.6 SN74LVC07ADRG3 SOIC D 14 2500 364.0 364.0 27.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.