Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SOIC 14

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FEATURES

DESCRIPTION/ORDERING INFORMATION

1OE

2OE

GND

4OE

3OE

D, DB, DGV, NS, OR PW PACKAGE

(TOP VIEW)

RGY PACKAGE

(TOP VIEW)

1 14

7 8

4OE

3OE

2OE

1OE

GND

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

SN74LVC126A

QUADRUPLE BUS BUFFER GATE

WITH 3-STATE OUTPUTS

SCAS339Q – MARCH 1994 – REVISED JULY 2005

• Operates From 1.65 V to 3.6 V

• Specified From –40 ° C to 85 ° C and

From –40 ° C to 125 ° C

• Inputs Accept Voltages to 5.5 V

• Max t

of 4.7 ns at 3.3 V

• Typical V

OLP

(Output Ground Bounce)

< 0.8 V at V

= 3.3 V, T

= 25 ° C

• Typical V

OHV

(Output V

Undershoot)

> 2 V at V

= 3.3 V, T

= 25 ° C

• Latch-Up Performance Exceeds 250 mA Per

JESD 17

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

This quadruple bus buffer gate is designed for 1.65-V

to 3.6-V V

operation.

The SN74LVC126A features independent line drivers

with 3-state outputs. Each output is disabled when

the associated output-enable (OE) input is low.

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in

a mixed 3.3-V/5-V system environment.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

–40 ° C to 85 ° C QFN – RGY Reel of 1000 SN74LVC126ARGYR LC126A

Tube of 50 SN74LVC126AD

SOIC – D Reel of 2500 SN74LVC126ADR LVC126A

Reel of 250 SN74LVC126ADT

SOP – NS Reel of 2000 SN74LVC126ANSR LVC126A

–40 ° C to 125 ° C SSOP – DB Reel of 2000 SN74LVC126ADBR LC126A

Tube of 90 SN74LVC126APW

TSSOP – PW Reel of 2000 SN74LVC126APWR LC126A

Reel of 250 SN74LVC126APWT

TVSOP – DGV Reel of 2000 SN74LVC126ADGVR LC126A

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (20 pages)

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SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS339Q – MARCH 1994 – REVISED JULY 2005 FEATURES • 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4OE 4A 4Y 3OE 3A 3Y RGY PACKAGE (TOP VIEW) 1A 1Y 2OE 2A 2Y DESCRIPTION/ORDERING INFORMATION This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation. VCC • 1 1 14 2 13 4OE 3 12 4A 4 11 4Y 5 6 10 3OE 9 3A The SN74LVC126A features independent line drivers with 3-state outputs.
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SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS339Q – MARCH 1994 – REVISED JULY 2005 FUNCTION TABLE (EACH BUFFER) INPUTS OE A OUTPUT Y H H H H L L L X Z LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A 2OE 2A 1 3OE 2 3 1Y 3A 4 4OE 5 6 2Y 4A 10 9 8 3Y 13 12 11 4Y Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V range (2) –0.5 6.5 V –0.5 VCC + 0.
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SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS339Q – MARCH 1994 – REVISED JULY 2005 Recommended Operating Conditions (1) TA = 25°C VCC Supply voltage VIH High-level input voltage Input voltage VO Output voltage High-level output current IOH MAX MIN MAX MIN MAX 1.65 3.6 1.65 3.6 1.65 3.6 1.5 1.5 1.5 0.65 × VCC 0.65 × VCC 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 1.7 1.7 VCC = 2.7 V to 3.6 V 2 2 2 0.35 × VCC 0.35 × VCC 0.35 × VCC 0.7 0.7 0.
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SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS339Q – MARCH 1994 – REVISED JULY 2005 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis FROM (INPUT) TO (OUTPUT) A OE OE VCC TA = 25°C MIN –40 TO 85°C TYP MAX –40 TO 125°C MIN MAX MIN MAX 1.8 V ± 0.15 V 1 4.2 9.3 1 9.8 1 11.3 2.5 V ± 0.2 V 1 2.7 6.7 1 7.2 1 9.3 2.7 V 1 2.9 5 1 5.2 1 6.5 3.3 V ± 0.
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SN74LVC126A QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCAS339Q – MARCH 1994 – REVISED JULY 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVC126ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74LVC126ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1 SN74LVC126ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC126ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74LVC126ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0 SN74LVC126ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC126ADT SOIC D 14 250 367.0 367.0 38.0 SN74LVC126ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LVC126APWR TSSOP PW 14 2000 367.0 367.0 35.
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MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.