Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SOT 23 5

DBV PACKAGE

(TOP VIEW)

GND

DCK PACKAGE

(TOP VIEW)

GND

DRL PACKAGE

(TOP VIEW)

GND

DRY PACKAGE

(TOP VIEW)

N.C.

GND

YZP PACKAGE

(BOTTOM VIEW)

GND

DSF PACKAGE

(TOP VIEW)

N.C.

SN74LVC1G126

www.ti.com

SCES224Q –APRIL 1999–REVISED DECEMBER 2013

Single Bus Buffer Gate With 3-State Output

Check for Samples: SN74LVC1G126

FEATURES

DESCRIPTION

This single bus buffer gate is designed for 1.65-V to

• Available in the Texas Instruments NanoFree™

5.5-V V

operation.

Package

The SN74LVC1G126 is a single line driver with a 3-

• Supports 5-V V

Operation

state output. The output is disabled when the output-

• Inputs Accept Voltages to 5.5 V

enable (OE) input is low.

• Provides Down Translation to V

NanoFree™ package technology is a major

• Max t

of 3.7 ns at 3.3 V

breakthrough in IC packaging concepts, using the die

• Low Power Consumption, 10-μA Max I

as the package.

• ±24-mA Output Drive at 3.3 V

To ensure the high-impedance state during power up

• I

off

Supports Live Insertion, Partial-Power-

or power down, OE should be tied to GND through a

Down Mode, and Back Drive Protection

pulldown resistor; the minimum value of the resistor is

determined by the current-sourcing capability of the

• Latch-Up Performance Exceeds 100 mA Per

driver.

JESD 78, Class II

This device is fully specified for partial-power-down

• ESD Protection Exceeds JESD 22

applications using I

off

. The I

off

circuitry disables the

– 2000-V Human-Body Model (A114-A)

outputs, preventing damaging current backflow

– 200-V Machine Model (A115-A)

through the device when it is powered down.

– 1000-V Charged-Device Model (C101)

N.C. – No internal connection

See mechanical drawings for dimensions.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
SN74LVC1G126 www.ti.com SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 Single Bus Buffer Gate With 3-State Output Check for Samples: SN74LVC1G126 FEATURES DESCRIPTION • This single bus buffer gate is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Provides Down Translation to VCC Max tpd of 3.7 ns at 3.3 V Low Power Consumption, 10-μA Max ICC ±24-mA Output Drive at 3.
PAGE 2
SN74LVC1G126 SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
PAGE 3
SN74LVC1G126 www.ti.com SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 Recommended Operating Conditions (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 1.5 UNIT V 0.65 × VCC 1.7 V 2 0.7 × VCC VCC = 1.65 V to 1.95 V 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 VIL Low-level input voltage VI Input voltage 0 5.
PAGE 4
SN74LVC1G126 SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS –40°C to 125°C TYP (1) MAX MIN VCC – 0.1 VCC – 0.1 IOH = –4 mA 1.65 V 1.2 1.2 IOH = –8 mA 2.3 V 1.9 1.9 2.4 2.4 2.3 2.3 3.8 3.8 IOH = –16 mA 3V IOH = –24 mA VOL MIN 1.65 V to 5.5 V IOH = –100 μA VOH –40°C to 85°C VCC TYP (1) MAX V IOH = –32 mA 4.5 V IOL = 100 μA 1.
PAGE 5
SN74LVC1G126 www.ti.com SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) –40°C to 125°C PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX tpd A Y 2.6 9 1.1 5.7 1 4.7 1 4.2 ns ten OE Y 2.8 9.6 1.3 6.8 1.2 5.5 1 5.2 ns tdis OE Y 1.
PAGE 6
SN74LVC1G126 SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com Parameter Measurement Information VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MΩ 1 MΩ 1 MΩ 1 MΩ 0.15 V 0.15 V 0.3 V 0.
PAGE 7
SN74LVC1G126 www.ti.com SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 Parameter Measurement Information (continued) VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.
PAGE 8
SN74LVC1G126 SCES224Q – APRIL 1999 – REVISED DECEMBER 2013 www.ti.com REVISION HISTORY Changes from Revision N (February 2007) to Revision O • Added DSF package option to the datasheet. ...................................................................................................................... 1 Changes from Revision O (March 2011) to Revision P • Page Page Removed Ordering Information table. ...................................................................................................
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 8.4 3.17 1.37 4.0 8.0 Q3 SN74LVC1G126DBVR SOT-23 DBV 5 3000 178.0 9.2 SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 9.2 3.3 3.2 1.55 4.0 8.0 Q3 3.17 3.23 1.37 4.0 8.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1G126DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74LVC1G126DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G126DBVR SOT-23 DBV 5 3000 205.0 200.0 33.0 SN74LVC1G126DBVT SOT-23 DBV 5 250 205.0 200.0 33.0 SN74LVC1G126DBVT SOT-23 DBV 5 250 180.0 180.0 18.
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 19
PAGE 20
PAGE 21
PAGE 22
PAGE 23
PAGE 24
D: Max = 1.44 mm, Min = 1.38 mm E: Max = 0.94 mm, Min = 0.
PAGE 25
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.