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FEATURES

Seemechanicaldrawingsfordimensions.

DBVPACKAGE

(TOP VIEW)

DCKPACKAGE

(TOP VIEW)

GND

YZP PACKAGE

(BOTTOMVIEW)

GND

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G373

SINGLE D-TYPE LATCH

WITH 3-STATE OUPUT

SCES528C – DECEMBER 2003 – REVISED MAY 2007

• Available in the Texas Instruments • I

off

Supports Partial-Power-Down Mode

NanoFree™ Package Operation

• Supports 5-V V

Operation • Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

• Inputs Accept Voltages to 5.5 V

• ESD Protection Exceeds JESD 22

• Max t

of 4 ns at 3.3 V

– 2000-V Human-Body Model (A114-A)

• Low Power Consumption, 10- µ A Max I

– 200-V Machine Model (A115-A)

• ± 24-mA Output Drive at 3.3 V

– 1000-V Charged-Device Model (C101)

This single D-type latch is designed for 1.65-V to 5.5-V V

operation.

The SN74LVC1G373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers,

and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When

LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

While the latch-enable (LE) input is high, the Q output follows the data (D) input. When LE is taken low, the Q

output is latched at the logic level set up at the D input.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

ORDERING INFORMATION

PACKAGE

(1) (2)

ORDERING PART NUMBER TOP-SIDE MARKING

(3)

NanoFree™ – WCSP (DSBGA)

Reel of 3000 SN74LVC1G373YZPR _ _ _D3_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000 SN74LVC1G373DBVR

SOT (SOT-23) – DBV CA3_

–40 ° C to 85 ° C

Reel of 250 SN74LVC1G373DBVT

Reel of 3000 SN74LVC1G373DCKR

SOT (SC-70) – DCK D3_

Reel of 250 SN74LVC1G373DCKT

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package .

(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

(3) DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (18 pages)

PAGE 1
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 FEATURES • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.
PAGE 2
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 DESCRIPTION/ORDERING INFORMATION (CONTINUED) OE does not affect the internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. A buffered output-enable (OE) input can be used to place the output in either a normal logic state (high or low logic levels) or the high-impedance state.
PAGE 3
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 6.5 V –0.5 VCC + 0.
PAGE 4
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 Recommended Operating Conditions (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V MIN MAX 1.65 5.5 Low-level input voltage 0.65 × VCC 1.7 V 2 0.7 × VCC 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 V 0.3 × VCC VCC = 4.5 V to 5.
PAGE 5
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = –100 µA VOH 1.65 V to 5.5 V 1.65 V 1.2 IOH = –8 mA 2.3 V 1.9 VOL 4.5 V IOL = 100 µA 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL= 32 mA 0.4 VI = 5.5 V or GND V 0.55 4.5 V 0.55 ±1 0 to 5.5 V IOZ VO = 0 to 5.
PAGE 6
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER FROM INPUT TO (OUTPUT) D tpd Q LE VCC = 1.8 V ± 0.15 V MIN VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MAX MIN MAX MIN MAX MIN MAX 2 16 1.5 7.3 1 5.4 1 4 2 16.3 1.5 7.4 1 5.
PAGE 7
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.
PAGE 8
SN74LVC1G373 SINGLE D-TYPE LATCH WITH 3-STATE OUPUT www.ti.com SCES528C – DECEMBER 2003 – REVISED MAY 2007 VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kW 500 W 500 W 500 W 0.15 V 0.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 8-Sep-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 7-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SOT-23 DBV 6 3000 178.0 9.2 SN74LVC1G373DCKR SC70 DCK 6 3000 178.0 9.2 SN74LVC1G373YZPR DSBGA YZP 6 3000 178.0 9.2 SN74LVC1G373DBVR Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) 3.2 1.55 4.0 8.0 Q3 2.4 2.4 1.22 4.0 8.0 Q3 1.02 1.52 0.63 4.0 8.0 Q1 3.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 7-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1G373DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC1G373DCKR SC70 DCK 6 3000 180.0 180.0 18.0 SN74LVC1G373YZPR DSBGA YZP 6 3000 220.0 220.0 35.
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D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.
PAGE 18
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.