Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate and inverter NAND gate 74LVC SC 70 5

A V

GND

DBV PACKAGE

(TOP VIEW)

YEP OR YZP PACKAGE

(BOTTOM VIEW)

DCK PACKAGE

(TOP VIEW)

A V

GND

See mechanical drawings for dimensions.

DRY PACKAGE

(TOP VIEW)

B NC

GND

DSF PACKAGE

(TOP VIEW)

GND

NC – No internal connection

SN74LVC1G38

www.ti.com

SCES538C –JANUARY 2004– REVISED MARCH 2011

SINGLE 2-INPUT NAND GATE

WITH OPEN-DRAIN OUTPUT

Check for Samples: SN74LVC1G38

FEATURES

• Available in the Texas Instruments NanoStar™ Operation

and NanoFree™ Packages

• Latch-Up Performance Exceeds 100 mA Per

• Supports 5-V V

Operation JESD 78, Class II

• Inputs Accept Voltages to 5.5 V • ESD Protection Exceeds JESD 22

• Max t

of 4.5 ns at 3.3 V – 2000-V Human-Body Model (A114-A)

• Low Power Consumption, 10-μA Max I

– 200-V Machine Model (A115-A)

• ±24-mA Output Drive at 3.3 V – 1000-V Charged-Device Model (C101)

• I

off

Supports Partial-Power-Down Mode

DESCRIPTION/ORDERING INFORMATION

The SN74LVC1G38 is designed for 1.65-V to 5.5-V V

operation.

This device is a single two-input NAND buffer gate with open-drain output. It performs the Boolean function

Y = A • B or Y = A + B in positive logic.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (21 pages)

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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT Check for Samples: SN74LVC1G38 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar™ and NanoFree™ Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4.5 ns at 3.3 V Low Power Consumption, 10-μA Max ICC ±24-mA Output Drive at 3.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com ORDERING INFORMATION PACKAGE (1) TA NanoStar™ – WCSP (DSBGA) 0.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com FUNCTION TABLE INPUTS A B OUTPUT Y L L H L H H H L H H H L LOGIC DIAGRAM (POSITIVE LOGIC) A 1 4 B Y 2 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com Recommended Operating Conditions (1) VCC Operating Supply voltage MAX 5.5 Data retention only 1.5 VCC = 2.3 V to 2.7 V High-level input voltage UNIT V 0.65 × VCC VCC = 1.65 V to 1.95 V VIH MIN 1.65 1.7 VCC = 3 V to 3.6 V V 2 0.7 × VCC VCC = 4.5 V to 5.5 V 0.35 × VCC VCC = 1.65 V to 1.95 V VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 VIL Low-level input voltage VI Input voltage 0 5.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A or B Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 2.8 10 1.6 6 1.4 4.5 1 3.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open GND CL (see Note A) RL TEST S1 tPZL (see Notes E and F) tPLZ (see Notes E and G) tPHZ/tPZH VLOAD VLOAD VLOAD LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.
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SN74LVC1G38 SCES538C – JANUARY 2004 – REVISED MARCH 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open GND CL (see Note A) RL TEST S1 tPZL (see Notes E and F) tPLZ (see Notes E and G) tPHZ/tPZH VLOAD VLOAD VLOAD LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 7-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74LVC1G38DBVR SOT-23 DBV 5 3000 178.0 9.2 SN74LVC1G38DBVR SOT-23 DBV 5 3000 180.0 SN74LVC1G38DBVT SOT-23 DBV 5 250 178.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 7-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1G38DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G38DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0 SN74LVC1G38DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G38DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G38DCKT SC70 DCK 5 250 202.0 201.0 28.0 SN74LVC1G38DRYR SON DRY 6 5000 180.0 180.
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D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.
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