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SN74LVC1T45

SCES515K –DECEMBER 2003–REVISED DECEMBER 2014

SN74LVC1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Voltage

Translation and 3-State Outputs

1 Features 3 Description

This single-bit noninverting bus transceiver uses two

• Available in the Texas Instruments NanoFree™

separate configurable power-supply rails. The A port

Package

is designed to track V

CCA

. V

CCA

accepts any supply

• Fully Configurable Dual-Rail Design Allows Each

voltage from 1.65 V to 5.5 V. The B port is designed

Port to Operate Over the Full 1.65-V to 5.5-V

to track V

CCB

. V

CCB

accepts any supply voltage from

Power-Supply Range

1.65 V to 5.5 V. This allows for universal low-voltage

bidirectional translation between any of the 1.8-V,

• V

Isolation Feature – If Either V

Input Is at

2.5-V, 3.3-V, and 5-V voltage nodes.

GND, Both Ports Are in the High-Impedance State

• DIR Input Circuit Referenced to V

CCA

The SN74LVC1T45 is designed for asynchronous

communication between two data buses. The logic

• Low Power Consumption, 4-μA Max I

levels of the direction-control (DIR) input activate

• ±24-mA Output Drive at 3.3 V

either the B-port outputs or the A-port outputs. The

• I

off

Supports Partial-Power-Down Mode Operation

device transmits data from the A bus to the B bus

when the B-port outputs are activated and from the B

• Max Data Rates

bus to the A bus when the A-port outputs are

– 420 Mbps (3.3-V to 5-V Translation)

activated. The input circuitry on both A and B ports

– 210 Mbps (Translate to 3.3 V)

always is active and must have a logic HIGH or LOW

level applied to prevent excess I

and I

CCZ

– 140 Mbps (Translate to 2.5 V)

– 75 Mbps (Translate to 1.8 V)

Device Information

(1)

• Latch-Up Performance Exceeds 100 mA Per

PART NUMBER PACKAGE BODY SIZE (NOM)

JESD 78, Class II

2.90 mm × 1.60 mm

• ESD Protection Exceeds JESD 22

SOT (6) 2.00 mm × 1.25 mm

SN74LVC1T45

– 2000-V Human-Body Model (A114-A)

1.60 mm × 1.20 mm

– 200-V Machine Model (A115-A)

DSBGA (6) 1.39 mm × 0.90 mm

– 1000-V Charged-Device Model (C101)

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

2 Applications

• Personal Electronic

• Industrial

• Enterprise

• Telecom

Functional Block Diagram

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

Summary of content (34 pages)

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Sample & Buy Product Folder Technical Documents Support & Community Tools & Software SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 SN74LVC1T45 Single-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation and 3-State Outputs 1 Features 3 Description • This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Description (Continued) ........................................ Pin Configuration and Functions ...............
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 5 Description (Continued) The SN74LVC1T45 is designed so that the DIR input is powered by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance state.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB MIN MAX UNIT Supply voltage –0.5 6.5 V (2) –0.5 6.5 V –0.5 6.5 V VI Input voltage VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 Recommended Operating Conditions (continued) See (1)(2)(3) VCCI VCCO MIN 1.65 to 1.95 V High-level input voltage VIH DIR (referenced to VCCA) (5) UNIT VCCA × 0.65 2.3 to 2.7 V 1.7 3 to 3.6 V V 2 4.5 to 5.5 V VCCA × 0.7 1.65 to 1.95 V DIR (referenced to VCCA) (5) MAX VCCA × 0.35 2.3 to 2.7 V 0.7 3 to 3.6 V 0.8 VIL Low-level input voltage VI Input voltage 0 5.5 V VO Output voltage 0 VCCO V 4.5 to 5.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 7.5 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = –100 μA IOH = –4 mA VOH IOH = –8 mA VI = VIH Ioff B port A or B port IOZ ICCA 1.9 V IOL = 100 μA 1.65 to 4.5 V 1.65 to 4.5 V 0.1 1.65 V 1.65 V 0.45 2.3 V 2.3 V 0.3 3V 3V 0.55 VI = VIL VI = VCCA or GND VI or VO = 0 to 5.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 7.6 Switching Characteristics (VCCA = 1.8 V ± 0.15 V) over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 9) PARAMETER tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B VCCB = 1.8 V ±0.15 V VCCB = 2.5 V ±0.2 V VCCB = 3.3 V ±0.3 V VCCB = 5 V ±0.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 7.8 Switching Characteristics (VCCA = 3.3 V ± 0.3 V) over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 9) PARAMETER FROM (INPUT) TO (OUTPUT) A B B A DIR A DIR B DIR A DIR B tPLH tPHL tPLH tPHL tPHZ tPLZ tPHZ tPLZ tPZH (1) tPZL (1) tPZH (1) tPZL (1) (1) VCCB = 1.8 V ±0.15 V VCCB = 2.5 V ±0.2 V VCCB = 3.3 V ±0.3 V VCCB = 5 V ±0.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 7.11 Typical Characteristics 9 8 8 7 7 6 6 t PLH − ns 10 9 t PHL − ns 10 5 5 4 4 3 3 2 2 1 1 0 0 0 5 10 20 15 25 30 0 35 5 10 Figure 1. Typical Propagation Delay (A to B) vs Load Capacitance 8 7 7 6 6 t PLH − ns 9 8 t PHL − ns 10 9 5 30 35 5 4 4 3 3 2 2 1 1 0 10 15 20 25 30 0 35 0 5 10 CL − pF TA = 25°C, VCCA = 2.5 V 15 20 CL − pF 25 30 35 TA = 25°C, VCCA = 2.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 10 10 9 9 8 8 7 7 6 t PLH − ns t PHL − ns Typical Characteristics (continued) 5 5 4 4 3 3 2 2 1 1 0 0 5 10 15 20 CL − pF 25 30 35 0 0 5 10 15 20 25 30 35 CL − pF TA = 25°C, VCCA = 5 V TA = 25°C, VCCA = 5 V Figure 7. Typical Propagation Delay (A to B) vs Load Capacitance 10 6 Figure 8.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 8 Parameter Measurement Information 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.15 V 0.15 V 0.3 V 0.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 9 Detailed Description 9.1 Overview The SN74LVC1T45 is single-bit, dual-supply, non-inverting voltage level translation. Pin A and that direction control pin (DIR) are supported by VCCA and pin B is supported by VCCB. The A port is able to accept I/O voltages ranging from 1.65 V to 5.5 V, while the B port can accept I/O voltages from 1.65 V to 5.5 V.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 10 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 10.2.1.3 Application Curve Figure 12. Translation Up (1.8 V to 5 V) at 2.5 MHz 10.2.2 Bidirectional Logic Level-Shifting Application Figure 13 shows the SN74LVC1T45 being used in a bidirectional logic level-shifting application. Since the SN74LVC1T45 does not have an output-enable (OE) pin, the system designer should take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 10.2.2.2.
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SN74LVC1T45 SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 www.ti.com 11 Power Supply Recommendations The SN74LVC1T45 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCA accepts any supply voltage from 1.65 V to 5.5 V and VCCB accepts any supply voltage from 1.65 V to 5.5 V. The A port and B port are designed to track VCCA and VCCB, respectively allowing for low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V and 5-V voltage nodes. 12 Layout 12.
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SN74LVC1T45 www.ti.com SCES515K – DECEMBER 2003 – REVISED DECEMBER 2014 13 Device and Documentation Support 13.1 Trademarks NanoFree is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 13.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 13.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 21-Jul-2014 PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Nov-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74LVC1T45DBVR SOT-23 DBV 6 3000 180.0 8.4 SN74LVC1T45DBVR SOT-23 DBV 6 3000 178.0 SN74LVC1T45DBVT SOT-23 DBV 6 250 180.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Nov-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1T45DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 SN74LVC1T45DBVR SOT-23 DBV 6 3000 180.0 180.0 18.0 SN74LVC1T45DBVT SOT-23 DBV 6 250 202.0 201.0 28.0 SN74LVC1T45DBVT SOT-23 DBV 6 250 180.0 180.0 18.0 SN74LVC1T45DCKR SC70 DCK 6 3000 202.0 201.0 28.0 SN74LVC1T45DCKR SC70 DCK 6 3000 180.0 180.
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PACKAGE OUTLINE YZP0006 DSBGA - 0.5 mm max height SCALE 9.000 DIE SIZE BALL GRID ARRAY B A E BALL A1 CORNER D C 0.5 MAX SEATING PLANE 0.19 0.15 BALL TYP 0.05 C 0.5 TYP C SYMM 1 TYP B 0.5 TYP D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.858 mm A 6X 0.015 0.25 0.21 C A B 1 2 SYMM 4219524/A 06/2014 NanoFree Is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only.
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EXAMPLE BOARD LAYOUT YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.225) 1 2 A (0.5) TYP SYMM B C SYMM LAND PATTERN EXAMPLE SCALE:40X ( 0.225) METAL 0.05 MAX METAL UNDER MASK 0.05 MIN ( 0.225) SOLDER MASK OPENING SOLDER MASK OPENING NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE 4219524/A 06/2014 NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
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EXAMPLE STENCIL DESIGN YZP0006 DSBGA - 0.5 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 6X ( 0.25) (R0.05) TYP 2 1 A (0.5) TYP SYMM B METAL TYP C SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X 4219524/A 06/2014 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. www.ti.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.