Datasheet

Seemechanicaldrawingsfordimensions.
DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOMVIEW)
1
V
CC
8
1A
2
7
1B 1Y
3 6
2Y
2B
4
5
GND
2A
3 6
2B
2Y
8
1
V
CC
1A
5
GND
4
2A
2
7
1Y1B
GND
5
4
2A
3
6
2B
2Y
2
7
1Y
1B
8
V
CC
1
1A
SN74LVC2G02
www.ti.com SCES194M –APRIL 1999–REVISED NOVEMBER 2013
Dual 2-Input Positive-NOR Gate
Check for Samples: SN74LVC2G02
1
FEATURES
DESCRIPTION
This dual 2-input positive-NOR gate is designed for
2
• Available in the Texas Instruments NanoFree™
1.65-V to 5.5-V V
CC
operation.
Package
The SN74LVC2G02 performs the Boolean function Y
• Supports 5-V V
CC
Operation
= A + B or Y = A • B in positive logic.
• Inputs Accept Voltages to 5.5 V
NanoFree™ package technology is a major
• Max t
pd
of 4.9 ns at 3.3 V
breakthrough in IC packaging concepts, using the die
• Low Power Consumption, 10-μA Max I
CC
as the package.
• ±24-mA Output Drive at 3.3 V
This device is fully specified for partial-power-down
• Typical V
OLP
(Output Ground Bounce)
applications using I
off
. The I
off
circuitry disables the
<0.8 V at V
CC
= 3.3 V, T
A
= 25°C
outputs, preventing damaging current backflow
• Typical V
OHV
(Output V
OH
Undershoot)
through the device when it is powered down.
>2 V at V
CC
= 3.3 V, T
A
= 25°C
• I
off
Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.