Datasheet
www.ti.com
FEATURES
DCKPACKAGE
(TOP VIEW)
3
4
2A
2
GND
2Y
5
1
1A
V
CC
6
1Y
DESCRIPTION/ORDERING INFORMATION
SN74LVC2G17-EP
DUAL SCHMITT-TRIGGER BUFFER
SCES683 – JANUARY 2007
• Controlled Baseline • Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25 ° C
– One Assembly/Test Site, One Fabrication
Site • I
off
Supports Partial-Power-Down Mode
Operation
• Enhanced Diminishing Manufacturing Sources
(DMS) Support • Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• Enhanced Product-Change Notification
• ESD Protection Exceeds JESD 22
• Qualification Pedigree
(1)
– 2000-V Human-Body Model (A114-A)
• Customer-Specific Configuration Control Can
Be Supported Along With Major-Change – 1000-V Charged-Device Model (C101)
Approval
• Supports 5-V V
CC
Operation
• Inputs Accept Voltages to 5.5 V
• Max t
pd
of 5.4 ns at 3.3 V
• Low Power Consumption, 10- µ A Max I
CC
• ± 24-mA Output Drive at 3.3 V
• Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25 ° C
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
This dual Schmitt-trigger buffer is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC2G17 contains two buffers and performs the Boolean function Y = A. The device functions as two
independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going
(V
T+
) and negative-going (V
T–
) signals.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
–55 ° C to 125 ° C SOT (SC-70) – DCK Reel of 3000 SN74LVC2G17MDCKREP BZV
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCK: The actual top-side marking has one additional character that designates the assembly/test site. Pin 1 identifier indicates
solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
(EACH INVERTER)
INPUT OUTPUT
A Y
H H
L L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.