Datasheet

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Seemechanicaldrawingsfordimensions.
DCTPACKAGE
(TOP VIEW)
DCUPACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOMVIEW)
1
V
CC
8
1A
2
7
1B 1C
3 6
2C
2B
4
5
GND 2A
3 6
2B2C
8
1
V
CC
1A
5
GND
4
2A
2
7
1C1B
GND
5
4
2A
3 6
2B2C
2
7
1C1B
8
V
CC
1
1A
DESCRIPTION/ORDERING INFORMATION
SN74LVC2G66
DUAL BILATERAL ANALOG SWITCH
SCES325J JULY 2001 REVISED FEBRUARY 2007
Available in the Texas Instruments High Speed, Typically 0.5 ns
NanoFree™ Package (V
CC
= 3 V, C
L
= 50 pF)
1.65-V to 5.5-V V
CC
Operation Rail-to-Rail Input/Output
Inputs Accept Voltages to 5.5 V Low On-State Resistance, Typically 6
(V
CC
= 4.5 V)
Max t
pd
of 0.8 ns at 3.3 V
Latch-Up Performance Exceeds 100 mA Per
High On-Off Output Voltage Ratio
JESD 78, Class II
High Degree of Linearity
This dual bilateral analog switch is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC2G66 can handle both analog and digital signals. The device permits signals with amplitudes of
up to 5.5 V (peak) to be transmitted in either direction.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
Each switch section has its own enable-input control (C). A high-level voltage applied to C turns on the
associated switch section.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(2)
NanoFree™ WCSP (DSBGA)
Reel of 3000 SN74LVC2G66YZPR _ _ _C6_
0.23-mm Large Bump YZP (Pb-free)
SSOP DCT Reel of 3000 SN74LVC2G66DCTR C66_ _ _
–40°C to 85°C
Reel of 3000 SN74LVC2G66DCUR
VSSOP DCU C66_
Reel of 250 SN74LVC2G66DCUT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2001–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

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