Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate OR gate 74LVC SOIC 14

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FEATURES

SN74LVC32A . . . RGY PACKAGE

(TOP VIEW)

1 14

7 8

GND

SN54LVC32A . . . J OR W PACKAGE

SN74LVC32A . . . D, DB, NS,

OR PW PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

GND

SN54LVC32A . . . FK PACKAGE

(TOP VIEW)

NC - No internal connection

DESCRIPTION/ORDERING INFORMATION

The 'LVC32A devices perform the Boolean function

Y  A  B or Y  A • B

in positive logic.

SN54LVC32A, SN74LVC32A

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCAS286P – JANUARY 1993 – REVISED APRIL 2005

• Typical V

OHV

(Output V

Undershoot)

>2 V at V

= 3.3 V, T

= 25°C

• Operate From 1.65 V to 3.6 V

• Latch-Up Performance Exceeds 250 mA Per

• Specified From –40°C to 85°C,

JESD 17

–40°C to 125°C, and –55°C to 125°C

• ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V

– 2000-V Human-Body Model (A114-A)

• Max t

of 3.8 ns at 3.3 V

– 200-V Machine Model (A115-A)

• Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C – 1000-V Charged-Device Model (C101)

The SN54LVC32A quadruple 2-input positive-OR gate is designed for 2.7-V to 3.6-V V

operation, and the

SN74LVC32A quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V

operation.

ORDERING INFORMATION

ORDERABLE TOP-SIDE

PACKAGE

(1)

PART NUMBER MARKING

–40°C to 85°C QFN – RGY Reel of 1000 SN74LVC32ARGYR LC32A

Tube of 50 SN74LVC32AD

SOIC – D Reel of 2500 SN74LVC32ADR LVC32A

Reel of 250 SN74LVC32ADT

SOP – NS Reel of 2000 SN74LVC32ANSR LVC32A

–40°C to 125°C

SSOP – DB Reel of 2000 SN74LVC32ADBR LC32A

Tube of 90 SN74LVC32APW

TSSOP – PW Reel of 2000 SN74LVC32APWR LC32A

Reel of 250 SN74LVC32APWT

CDIP – J Tube of 25 SNJ54LVC32AJ SNJ54LVC32AJ

–55°C to 125°C CFP – W Tube of 150 SNJ54LVC32AW SNJ54LVC32AW

LCCC – FK Tube of 55 SNJ54LVC32AFK SNJ54LVC32AFK

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

Summary of content (25 pages)

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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 FEATURES • • • • Operate From 1.65 V to 3.6 V Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C Inputs Accept Voltages to 5.5 V Max tpd of 3.8 ns at 3.3 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 SN54LVC32A . . .
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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 Recommended Operating Conditions (1) SN54LVC32A –55 TO 125°C Operating VCC Supply voltage VIH High-level input voltage VCC = 2.7 V to 3.6 V VIL Low-level input voltage VCC = 2.7 V to 3.6 V VI Input voltage VO Output voltage Data retention only IOH High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate (1) MIN MAX 2 3.6 1.
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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) SN54LVC32A PARAMETER TEST CONDITIONS VCC –55 TO 125°C UNIT MIN MAX IOH = –100 µA VOH VOL 2.7 V to 3.6 V 2.2 3V 2.4 IOH = –24 mA 3V 2.2 IOL = 100 µA 2.7 V to 3.6 V 0.2 IOL = 12 mA 2.7 V 0.4 3V 0.55 IOH = –12 mA IOL = 24 mA II ICC ∆ICC VCC – 0.2 2.7 V V V VI = 5.
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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 Switching Characteristics over operating free-air temperature range (unless otherwise noted) (see Figure 1) SN74LVC32A PARAMETER tpd FROM (INPUT) A or B TO (OUTPUT) Y tsk(o) VCC TA = 25°C –40 TO 85°C –40 TO 125°C MIN TYP MAX MIN MAX MIN MAX 1.8 V ± 0.15 V 1 4.2 8.2 1 8.7 1 10.2 2.5 V ± 0.2 V 1 2.6 4.9 1 5.4 1 6.9 2.7 V 1 3 4.2 1 4.4 1 5.5 3.3 V ± 0.
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SN54LVC32A, SN74LVC32A QUADRUPLE 2-INPUT POSITIVE-OR GATES www.ti.com SCAS286P – JANUARY 1993 – REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 18-Oct-2013 Status (1) SNJ54LVC32AW ACTIVE Package Type Package Pins Package Drawing Qty CFP W 14 1 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD A42 N / A for Pkg Type Op Temp (°C) Device Marking (4/5) -55 to 125 5962-9761801QD A SNJ54LVC32AW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVC32ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74LVC32ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC32ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC32ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74LVC32ADR SOIC D 14 2500 333.2 345.9 28.6 SN74LVC32ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC32ADT SOIC D 14 250 367.0 367.0 38.0 SN74LVC32ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LVC32APWR TSSOP PW 14 2000 364.0 364.0 27.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.