Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Gate and inverter XOR gate 74LVC SOIC 14

www.ti.com

FEATURES

SN54LVC86A . . . J OR W PACKAGE

SN74LVC86A . . . D, DB, NS, OR PW PACKAGE

(TOP VIEW)

GND

3 2 1 20 19

9 10 11 12 13

GND

SN54LVC86A . . . FK PACKAGE

(TOP VIEW)

NC - No internal connection

SN74LVC86A . . . RGY PACKAGE

(TOP VIEW)

1 14

7 8

GND

DESCRIPTION/ORDERING INFORMATION

SN54LVC86A, SN74LVC86A

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS288P – JANUARY 1993 – REVISED APRIL 2005

• Typical V

OHV

(Output V

Undershoot)

>2 V at V

= 3.3 V, T

= 25 ° C

• Operate From 1.65 V to 3.6 V

• Latch-Up Performance Exceeds 250 mA Per

• Specified From –40 ° C to 85 ° C,

JESD 17

–40 ° C to 125 ° C, and –55 ° C to 125 ° C

• ESD Protection Exceeds JESD 22

• Inputs Accept Voltages to 5.5 V

– 2000-V Human-Body Model (A114-A)

• Max t

of 4.6 ns at 3.3 V

– 200-V Machine Model (A115-A)

• Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25 ° C – 1000-V Charged-Device Model (C101)

The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7-V to 3.6-V V

operation, and the

SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65-V to 3.6-V V

operation.

The 'LVC86A devices perform the Boolean function Y = A ⊕ B or Y = AB + A B in positive logic.

ORDERING INFORMATION

ORDERABLE TOP-SIDE

PACKAGE

(1)

PART NUMBER MARKING

–40 ° C to 85 ° C QFN – RGY Reel of 1000 SN74LVC86ARGYR LC86A

Tube of 50 SN74LVC86AD

SOIC – D Reel of 2500 SN74LVC86ADR LVC86A

Reel of 250 SN74LVC86ADT

SOP – NS Reel of 2000 SN74LVC86ANSR LVC86A

–40 ° C to 125 ° C

SSOP – DB Reel of 2000 SN74LVC86ADBR LC86A

Tube of 90 SN74LVC86APW

TSSOP – PW Reel of 2000 SN74LVC86APWR LC86A

Reel of 250 SN74LVC86APWT

CDIP – J Tube of 25 SNJ54LVC86AJ SNJ54LVC86AJ

–55 ° C to 125 ° C CFP – W Tube of 150 SNJ54LVC86AW SNJ54LVC86AW

LCCC – FK Tube of 55 SNJ54LVC86AFK SNJ54LVC86AFK

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

Summary of content (25 pages)

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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 FEATURES • • • • SN54LVC86A . . . J OR W PACKAGE SN74LVC86A . . . D, DB, NS, OR PW PACKAGE (TOP VIEW) 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y 2A 2B 2Y 14 1B 1A NC VCC 4B 1 2 13 4B 3 12 4A 4 11 4Y 10 3B 5 6 9 3A 7 8 SN54LVC86A . . .
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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output. Inputs can be driven from either 3.3-V or 5-V devices.
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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V –0.5 VCC + 0.
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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 Recommended Operating Conditions (1) SN74LVC86A TA = 25°C VCC Supply voltage VIH High-level input voltage Low-level input voltage VIL Operating –40 TO 85°C –40 TO 125°C MAX MIN MAX MIN MAX 1.65 3.6 1.65 3.6 1.65 3.6 Data retention only 1.5 1.5 1.5 0.65 × VCC 0.65 × VCC 0.65 × VCC VCC = 2.3 V to 2.7 V 1.7 1.7 1.7 VCC = 2.7 V to 3.6 V 2 VCC = 1.65 V to 1.
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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) SN74LVC86A PARAMETER TEST CONDITIONS VCC TA = 25°C MIN IOH = –100 µA VOH 1.65 V to 3.6 V VCC – 0.2 VCC – 0.2 VCC – 0.3 1.29 1.2 1.05 IOH = –8 mA 2.3 V 1.9 1.7 1.55 2.7 V 2.2 2.2 2.05 3V 2.4 2.4 2.25 IOH = –24 mA 3V 2.3 2.2 2 IOL = 100 µA 0.1 0.2 1.65 V 0.24 0.
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SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES www.ti.com SCAS288P – JANUARY 1993 – REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) SNJ54LVC86AW ACTIVE Package Type Package Pins Package Drawing Qty CFP W 14 1 Eco Plan Lead/Ball Finish (2) TBD MSL Peak Temp Op Temp (°C) Device Marking (3) A42 N / A for Pkg Type (4/5) -55 to 125 5962-9761901QD A SNJ54LVC86AW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVC86ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 SN74LVC86ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 SN74LVC86ADT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC86ADBR SSOP DB 14 2000 367.0 367.0 38.0 SN74LVC86ADR SOIC D 14 2500 367.0 367.0 38.0 SN74LVC86ADT SOIC D 14 250 367.0 367.0 38.0 SN74LVC86ANSR SO NS 14 2000 367.0 367.0 38.0 SN74LVC86APWR TSSOP PW 14 2000 367.0 367.0 35.0 SN74LVC86APWT TSSOP PW 14 250 367.0 367.0 35.
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MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.