Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Receiver, transceiver TSSOP 20

www.ti.com

FEATURES

SN74LVCH245A . . . RGY PACKAGE

(TOP VIEW)

1 20

10 11

DIR

GND

SN54LVCH245A . . . J OR W PACKAGE

SN74LVCH245A . . . DB, DGV, DW, NS,

OR PW PACKAGE

(TOP VIEW)

DIR

GND

SN54LVCH245A . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

10 11 12 13

DIR

GND

DESCRIPTION/ORDERING INFORMATION

SN54LVCH245A, SN74LVCH245A

OCTAL BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCES008O – JULY 1995 – REVISED DECEMBER 2005

• Operate From 1.65 V to 3.6 V • I

off

Supports Partial-Power-Down Mode

Operation

• Inputs Accept Voltages to 5.5 V

• Bus Hold on Data Inputs Eliminates the Need

• Max t

of 6.3 ns at 3.3 V

for External Pullup/Pulldown Resistors

• Typical V

OLP

(Output Ground Bounce)

• Latch-Up Performance Exceeds 250 mA Per

<0.8 V at V

= 3.3 V, T

= 25 ° C

JESD 17

• Typical V

OHV

(Output V

Undershoot)

• ESD Protection Exceeds JESD 22

>2 V at V

= 3.3 V, T

= 25 ° C

– 2000-V Human-Body Model (A114-A)

• Support Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage With – 200-V Machine Model (A115-A)

3.3-V V

)

The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V

operation, and the

SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V

operation.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators

in a mixed 3.3-V/5-V system environment.

These devices are designed for asynchronous communication between data buses. These devices transmit data

from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control

(DIR) input. The output-enable ( OE) input can be used to disable the device so the buses are effectively isolated.

These devices are fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the

outputs, preventing damaging current backflow through the devices when they are powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to V

through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or

pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input

circuit and is not disabled by OE or DIR.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 FEATURES 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 A1 A2 A3 A4 A5 A6 A7 A8 1 20 19 OE 18 B1 2 3 17 B2 16 B3 4 5 15 B4 14 B5 6 7 8 13 B6 12 B7 9 10 11 SN54LVCH245A . . . FK PACKAGE (TOP VIEW) A2 A1 DIR VCC SN74LVCH245A . . .
PAGE 2
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.
PAGE 3
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 LOGIC DIAGRAM (POSITIVE LOGIC) DIR 1 19 A1 OE 2 18 B1 To Seven Other Channels Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V range (2) VI Input voltage –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.
PAGE 4
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 Recommended Operating Conditions (1) SN54LVCH245A VCC Supply voltage VIH High-level input voltage Operating Data retention only MIN MAX MIN MAX 2 3.6 1.65 3.6 1.5 1.5 VCC = 2.3 V to 2.7 V 1.7 2 Low-level input voltage Input voltage VO Output voltage 0.7 0.8 High-level output current 0 5.5 0 5.5 High or low state 0 VCC 0 VCC 3-state 0 5.5 0 5.
PAGE 5
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC SN54LVCH245A MIN TYP (1) SN74LVCH245A MAX 2.7 V to 3.6 V VOH 1.65 V 1.2 IOH = –8 mA 2.3 V 1.7 IOH = –24 mA Control inputs Ioff 2.2 0.2 0.2 0.45 0.7 IOL = 12 mA 2.7 V 0.4 0.4 3V 0.55 0.55 VI = 0 to 5.5 V 0 3V VI = 0 to 3.
PAGE 6
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVCH245A PARAMETER FROM (INPUT) TO (OUTPUT) MIN MAX MIN tpd A or B B or A 8 1 7 ns ten OE A or B 9.5 1 8.5 ns tdis OE A or B 8.5 1 7.5 ns VCC = 2.7 V VCC = 3.3 V ± 0.
PAGE 7
SN54LVCH245A, SN74LVCH245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS www.ti.com SCES008O – JULY 1995 – REVISED DECEMBER 2005 PARAMETER MEASUREMENT INFORMATION VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 2.7 V 3.3 V ± 0.3 V VI tr/tf VCC VCC 2.7 V 2.7 V ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.com (4) 18-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74LVCH245ADBR SSOP DB 20 2000 330.0 16.4 SN74LVCH245ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LVCH245ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.3 2.7 12.0 24.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 8-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVCH245ADBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LVCH245ADGVR TVSOP DGV 20 2000 367.0 367.0 35.0 SN74LVCH245ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LVCH245ANSR SO NS 20 2000 367.0 367.0 45.0 SN74LVCH245APWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74LVCH245APWR TSSOP PW 20 2000 364.0 364.
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 19
MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°– 8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 20
PAGE 21
PAGE 22
PAGE 23
PAGE 24
PAGE 25
PAGE 26
PAGE 27
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 28
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.