Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SSOP 48

www.ti.com

FEATURES

1OE

1Y1

1Y2

GND

1Y3

1Y4

2Y1

2Y2

GND

2Y3

2Y4

3Y1

3Y2

GND

3Y3

3Y4

4Y1

4Y2

GND

4Y3

4Y4

4OE

2OE

1A1

1A2

GND

1A3

1A4

2A1

2A2

GND

2A3

2A4

3A1

3A2

GND

3A3

3A4

4A1

4A2

GND

4A3

4A4

3OE

SN54LVTH16241...WDPACKAGE

SN74LVTH16241...DGGORDL PACKAGE

(TOP VIEW)

DESCRIPTION/ORDERING INFORMATION

SN54LVTH16241 , , SN74LVTH16241

3.3-V ABT 16-BIT BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS693D – MAY 1997 – REVISED NOVEMBER 2006

• Members of the Texas Instruments Widebus™

Family

• State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V Operation

and Low Static-Power Dissipation

• Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V V

)

• Support Unregulated Battery Operation Down

to 2.7 V

• Typical V

OLP

(Output Ground Bounce) <0.8 V

at V

= 3.3 V, T

= 25 ° C

• I

off

and Power-Up 3-State Support Hot

Insertion

• Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

• Distributed V

and GND Pin Configuration

Minimizes High-Speed Switching Noise

• Flow-Through Architecture Optimizes PCB

Layout

• Latch-Up Performance Exceeds 500 mA Per

JESD 17

• ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

• Package Options Include Plastic Shrink

Small-Outline (DL) and Thin Shrink

Small-Outline (DGG) Packages and 380-mil

Fine-Pitch Ceramic Flat (WD) Package Using

25-mil Center-to-Center Spacings

These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) V

operation, but with the

capability to provide a TTL interface to a 5-V system environment.

The devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. The devices provide

noninverting outputs and complementary output-enable (OE and OE) inputs.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

74LVTH16241DLRG4

Reel of 1000

SN74LVTH16241DLR

SSOP – DL LVTH16241

SN74LVTH16241DL

–40 ° C to 85 ° C Tube of 25

SN74LVTH16241DLG4

74LVTH16241DGGRE4

TSSOP – DGG Reel of 2000 LVTH16241

SN74LVTH16241DGGR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (15 pages)

PAGE 1
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 FEATURES • • • • • • • • • • • • Members of the Texas Instruments Widebus™ Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) <0.
PAGE 2
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 DESCRIPTION/ORDERING INFORMATION (CONTINUED) When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.
PAGE 3
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 LOGIC SYMBOL(A) 1 EN1 1OE 48 EN2 2OE 25 3OE EN3 24 EN4 4OE 2 47 1 1A1 1 1Y1 46 3 44 5 43 6 1Y2 1A2 1Y3 1A3 1Y4 1A4 8 41 1 2A1 2 2Y1 40 9 38 11 37 12 36 13 2Y2 2A2 2Y3 2A3 2Y4 2A4 1 3A1 3 3Y1 35 14 33 16 32 17 30 19 3A2 3Y2 3A3 3Y3 3A4 3Y4 1 4A1 4 4Y1 29 20 27 22 26 23 4Y2 4A2 4A3 4Y3 4Y4 4A4 A.
PAGE 4
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.
PAGE 5
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 4.6 V VI Input voltage range (2) –0.5 7 V –0.5 7 V –0.5 VCC + 0.
PAGE 6
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 Electrical Characteristics over recemmended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 2.7 V, II = –18 mA VCC = 2.7 V to 3.6 V, IOH = –100 µA VCC = 2.7 V, IOH = –8 mA VCC = 3 V VCC = 2.7 V VOL VCC = 3 V IOH = –24 mA SN54LVTH16241 (1) MIN TYP (2) SN74LVTH16241 MAX MIN TYP (2) –1.2 –1.2 VCC – 0.
PAGE 7
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 Switching Characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER TO (OUTPUT) A Y OE or OE Y OE or OE Y SN54LVTH16241 (1) 3.7 4 1.2 2.6 3.5 3.8 1.1 3.7 4 1.2 2.2 3.5 3.8 1.1 4.7 5.3 1.2 3.2 4.5 5.1 1.1 4.7 5.2 1.2 3.2 4.5 4.9 1.9 5.5 6.1 2 3.7 5.3 5.
PAGE 8
SN54LVTH16241,, SN74LVTH16241 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS www.ti.com SCBS693D – MAY 1997 – REVISED NOVEMBER 2006 PARAMETER MEASUREMENT INFORMATION 6V 500 W From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 W TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 2.7 V 1.5 V Input th 2.7 V 1.5 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION 2.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVTH16241DGGR Package Package Pins Type Drawing TSSOP DGG 48 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 8.6 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 15.8 1.8 12.0 24.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH16241DGGR TSSOP DGG 48 2000 367.0 367.0 45.
PAGE 13
PAGE 14
MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 15
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.