Datasheet

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FEATURES

SN54LVTH16373 . . . WD PACKAGE

SN74LVTH16373 . . . DGG OR DL PACKAGE

(TOP VIEW)

1OE

1Q1

1Q2

GND

1Q3

1Q4

1Q5

1Q6

GND

1Q7

1Q8

2Q1

2Q2

GND

2Q3

2Q4

2Q5

2Q6

GND

2Q7

2Q8

2OE

1LE

1D1

1D2

GND

1D3

1D4

1D5

1D6

GND

1D7

1D8

2D1

2D2

GND

2D3

2D4

2D5

2D6

GND

2D7

2D8

2LE

DESCRIPTION/ORDERING INFORMATION

SN54LVTH16373 , , SN74LVTH16373

3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES

WITH 3-STATE OUTPUTS

SCBS144P – MAY 1992 – REVISED NOVEMBER 2006

• Members of the Texas Instruments Widebus™

Family

• State-of-the-Art Advanced BiCMOS

Technology (ABT) Design for 3.3-V Operation

and Low Static-Power Dissipation

• Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V V

)

• Support Unregulated Battery Operation Down

to 2.7 V

• Typical V

OLP

(Output Ground Bounce) <0.8 V

at V

= 3.3 V, T

= 25 ° C

• I

off

and Power-Up 3-State Support Hot

Insertion

• Bus Hold on Data Inputs Eliminates the Need

for External Pullup/Pulldown Resistors

• Distributed V

and GND Pins Minimize

High-Speed Switching Noise

• Flow-Through Architecture Optimizes PCB

Layout

• Latch-Up Performance Exceeds 500 mA Per

JESD 17

• ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage

(3.3-V) V

operation, but with the capability to provide a TTL interface to a 5-V system environment. These

devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and

working registers.

ORDERING INFORMATION

PACKAGE

(1)

ORDERABLE PART NUMBER TOP-SIDE MARKING

FBGA – GRD SN74LVTH16373GRDR

Reel of 1000 LL373

FBGA – ZRD (Pb-free) SN74LVTH16373ZRDR

Tube of 25 SN74LVTH16373DL

SN74LVTH16373DLG4

SSOP – DL LVTH16373

–40 ° C to 85 ° C Reel of 1000 SN74LVTH16373DLR

SN74LVTH16373DLRG4

TSSOP – DGG Reel of 2000 SN74LVTH16373DGGR LVTH16373

VFBGA – GQL SN74LVTH16373GQLR

Reel of 1000 LL373

VFBGA – ZQL (Pb-free) SN74LVTH16373ZQLR

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Widebus is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

On products compliant to MIL-PRF-38535, all parameters are

Instruments standard warranty. Production processing does not

tested unless otherwise noted. On all other products, production

necessarily include testing of all parameters.

processing does not necessarily include testing of all parameters.

Summary of content (20 pages)

PAGE 1
SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 FEATURES • • • • • • • • • • • Members of the Texas Instruments Widebus™ Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2.
PAGE 2
SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 ORDERING INFORMATION (continued) PACKAGE (1) TA –55°C to 125°C CFP – WD ORDERABLE PART NUMBER Tube SNJ54LVTH16373WD TOP-SIDE MARKING SNJ54LVTH16373WD 5962-9681001QXA DESCRIPTION/ORDERING INFORMATION (CONTINUED) These devices can be used as two 8-bit latches or one 16-bit latch.
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SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.
PAGE 4
SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 4.6 V VI Input voltage range (2) –0.5 7 V –0.5 7 V –0.5 VCC + 0.
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SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 2.7 V, II = –18 mA VCC = 2.7 V to 3.6 V, IOH = –100 µA VCC = 2.7 V, IOH = –8 mA VCC = 3 V VCC = 2.7 V VOL VCC = 3 V IOH = –24 mA SN54LVTH16373 MIN TYP (1) SN74LVTH16373 MAX MIN TYP (1) MAX –1.2 –1.
PAGE 6
SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 Timing Requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVTH16373 VCC = 3.3 V ± 0.3 V SN74LVTH16373 VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MIN MAX MIN VCC = 2.7 V MAX MIN UNIT MAX tw Pulse duration, LE high 3 3 3 3 ns tsu Setup time, data before LE↓ 2 2 1 0.
PAGE 7
SN54LVTH16373,, SN74LVTH16373 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCBS144P – MAY 1992 – REVISED NOVEMBER 2006 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test 6V Open S1 GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V Timing Input LOAD CIRCUIT 1.5 V 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V Data Input 1.5 V 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 10-Oct-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVTH16373DGGR SN74LVTH16373DLR Package Package Pins Type Drawing TSSOP SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 SN74LVTH16373ZQLR BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.5 8.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 10-Oct-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH16373DGGR TSSOP DGG 48 2000 367.0 367.0 45.0 SN74LVTH16373DLR SSOP DL 48 1000 367.0 367.0 55.0 SN74LVTH16373ZQLR BGA MICROSTAR JUNIOR ZQL 56 1000 333.2 345.9 28.6 SN74LVTH16373ZRDR BGA MICROSTAR JUNIOR ZRD 54 1000 333.2 345.9 28.
PAGE 13
MECHANICAL DATA MCFP010B – JANUARY 1995 – REVISED NOVEMBER 1997 WD (R-GDFP-F**) CERAMIC DUAL FLATPACK 48 LEADS SHOWN 0.120 (3,05) 0.075 (1,91) 0.009 (0,23) 0.004 (0,10) 1.130 (28,70) 0.870 (22,10) 0.370 (9,40) 0.250 (6,35) 0.390 (9,91) 0.370 (9,40) 0.370 (9,40) 0.250 (6,35) 48 1 0.025 (0,635) A 0.014 (0,36) 0.008 (0,20) 25 24 NO. OF LEADS** 48 56 A MAX 0.640 (16,26) 0.740 (18,80) A MIN 0.610 (15,49) 0.710 (18,03) 4040176 / D 10/97 NOTES: A. B. C. D. E.
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MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice.
PAGE 20
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.