Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Buffer, driver SOIC 20

SN54LVTH240, SN74LVTH240

3.3-V ABT OCTAL BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 3.3-V V

)

D Support Unregulated Battery Operation

Down to 2.7 V

D Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C

D I

off

and Power-Up 3-State Support Hot

Insertion

D Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

D Latch-Up Performance Exceeds 500 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

SN54LVTH240 ...J OR W PACKAGE

SN74LVTH240 . . . DB, DW, NS,

OR PW PACKAGE

(TOP VIEW)

3212019

910111213

1Y1

2A4

1Y2

2A3

1Y3

1A2

2Y3

1A3

2Y2

1A4

SN54LVTH240 . . . FK PACKAGE

(TOP VIEW)

2Y4

1A1

1OE

1Y4

2A2 2OE

2Y1

GND

2A1

SN74LVTH240 . . . RGY PACKAGE

(TOP VIEW)

120

10 11

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

2A1

GND

1OE

description/ordering information

These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) V

operation, but with the

capability to provide a TTL interface to a 5-V system environment.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGY Tape and reel SN74LVTH240RGYR LXH240

SOIC DW

Tube SN74LVTH240DW

LVTH240

SOIC − DW

Tape and reel SN74LVTH240DWR

LVTH240

SOP − NS Tape and reel SN74LVTH240NSR LVTH240

−40°C to 85°C

SSOP − DB Tape and reel SN74LVTH240DBR LXH240

40 C

85 C

TSSOP PW

Tube SN74LVTH240PW

LXH240

TSSOP − PW

Tape and reel SN74LVTH240PWR

LXH240

VFBGA − GQN

Tape and reel

SN74LVTH240GQNR

LXH240

VFBGA − ZQN (Pb-free)

Tape and reel

SN74LVTH240ZQNR

LXH240

CDIP − J Tube SNJ54LVTH240J SNJ54LVTH240J

−55°C to 125°C

CFP − W Tube SNJ54LVTH240W SNJ54LVTH240W

55 C

125 C

LCCC − FK Tube SNJ54LVTH240FK SNJ54LVTH240FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

Summary of content (23 pages)

PAGE 1
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 20 2Y4 1A1 1OE VCC 1 19 2OE 18 1Y1 2 3 17 2A4 16 1Y2 4 5 15 2A3 14 1Y3 6 7 SN54LVTH240 . . .
PAGE 2
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 description/ordering information (continued) These devices are organized as two 4-bit buffer/line drivers with separate output-enable (OE) inputs. When OE is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
PAGE 3
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Pin numbers shown are for the DB, DW, FK, J, NS, PW, RGY, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . .
PAGE 4
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 recommended operating conditions (see Note 5) SN54LVTH240 SN74LVTH240 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 0.8 VI Input voltage 5.5 5.
PAGE 5
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LVTH240 PARAMETER VIK VOH TEST CONDITIONS VCC = 2.7 V, II = −18 mA VCC = 2.7 V to 3.6 V, IOH = −100 μA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VCC = 3 V MIN TYP† SN74LVTH240 MAX VOL VCC = 3 V TYP† −1.2 VCC−0.2 2.4 2.4 II Data inputs Ioff 0.2 0.
PAGE 6
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVTH240 PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ † 6 FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y VCC = 3.3 V ± 0.3 V SN74LVTH240 VCC = 2.7 V VCC = 3.3 V ± 0.3 V VCC = 2.7 V UNIT MAX MIN TYP† MAX 4.3 5.1 1.
PAGE 7
SN54LVTH240, SN74LVTH240 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS679K − DECEMBER 1996 − REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION 6V 500 Ω From Output Under Test Open S1 GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu th 2.7 V 1.5 V Input 1.5 V 2.7 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
PAGE 11
PACKAGE OPTION ADDENDUM www.ti.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 10-Oct-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74LVTH240DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74LVTH240DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74LVTH240NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.
PAGE 13
PACKAGE MATERIALS INFORMATION www.ti.com 10-Oct-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH240DBR SN74LVTH240DWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74LVTH240NSR SO NS 20 2000 367.0 367.0 45.0 SN74LVTH240PWR TSSOP PW 20 2000 367.0 367.0 38.
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PAGE 22
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 23
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.