Datasheet

www.ti.com
FEATURES
GKE OR ZKE PACKAGE
(TOP VIEW)
1 2 3 4 5 6
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
DESCRIPTION/ORDERING INFORMATION
SN74LVTH32373
3.3-V ABT 32-BIT TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCBS751B OCTOBER 2000 REVISED DECEMBER 2006
Member of Texas Instruments Widebus+™ Bus Hold on Data Inputs Eliminates the Need
Family for External Pullup/Pulldown Resistors
State-of-the-Art Advanced BiCMOS Supports Unregulated Battery Operation
Technology (ABT) Design for 3.3-V Operation Down to 2.7 V
and Low Static-Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
Typical V
OLP
(Output Ground Bounce) <0.8 V JESD 17
at V
CC
= 3.3 V, T
A
= 25 ° C
ESD Protection Exceeds JESD 22
I
off
and Power-Up 3-State Support Hot
2000-V Human-Body Model (A114-A)
Insertion
200-V Machine Model (A115-A)
Supports Mixed-Mode Signal Operation (5-V
1000-V Charged-Device Model (C101)
Input/Output Voltage With 3.3-V V
CC
)
TERMINAL ASSIGNMENTS
1 2 3 4 5 6
A 1Q2 1Q1 1 OE 1LE 1D1 1D2
B 1Q4 1Q3 GND GND 1D3 1D4
C 1Q6 1Q5 1V
CC
1V
CC
1D5 1D6
D 1Q8 1Q7 GND GND 1D7 1D8
E 2Q2 2Q1 GND GND 2D1 2D2
F 2Q4 2Q3 1V
CC
1V
CC
2D3 2D4
G 2Q6 2Q5 GND GND 2D5 2D6
H 2Q7 2Q8 2 OE 2LE 2D8 2D7
J 3Q2 3Q1 3 OE 3LE 3D1 3D2
K 3Q4 3Q3 GND GND 3D3 3D4
L 3Q6 3Q5 2V
CC
2V
CC
3D5 3D6
M 3Q8 3Q7 GND GND 3D7 3D8
N 4Q2 4Q1 GND GND 4D1 4D2
P 4Q4 4Q3 2V
CC
2V
CC
4D3 4D4
R 4Q6 4Q5 GND GND 4D5 4D6
T 4Q7 4Q8 4 OE 4LE 4D8 4D7
The SN74LVTH32373 is a 32-bit transparent D-type latch designed for low-voltage (3.3-V) V
CC
operation, but
with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for
implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
This device can be used as four 8-bit latches, two 16-bit latches, or one 32-bit latch. When the latch-enable (LE)
input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the
levels set up at the D inputs.
A buffered output-enable ( OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Summary of content (14 pages)