Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Receiver, transceiver SOIC 24

 

    

  

SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Support Mixed-Mode Signal Operation

(5-V Input and Output Voltages With

3.3-V V

)

D Typical V

OLP

(Output Ground Bounce)

<0.8 V at V

= 3.3 V, T

= 25°C

D Support Unregulated Battery Operation

Down to 2.7 V

D I

off

and Power-Up 3-State Support Hot

Insertion

D Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

D Latch-Up Performance Exceeds 500 mA Per

JESD 17

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

SN54LVTH543 ...JT OR W PACKAGE

SN74LVTH543 . . . DB, DGV, DW, NS, OR PW PACKAGE

(TOP VIEW)

LEBA

OEBA

CEAB

GND

CEBA

LEAB

OEAB

SN54LVTH543 . . . FK PACKAGE

(TOP VIEW)

3212827

12 13

426

14 15 16 17 18

CEAB

GND

OEAB

LEAB

OEBA

LEBA

CEBA

NC − No internal connection

description/ordering information

These octal transceivers are designed specifically for low-voltage (3.3-V) V

operation, but with the capability

to provide a TTL interface to a 5-V system environment.

ORDERING INFORMATION

PACKAGE

†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

SOIC − DW

Tube SN74LVTH543DW

LVTH543

SOIC − DW

Tape and reel SN74LVTH543DWR

LVTH543

SOP − NS Tape and reel SN74LVTH543NSR LVTH543

−40°C to 85°C

SSOP − DB Tape and reel SN74LVTH543DBR LXH543

−40 C to 85 C

TSSOP − PW

Tube SN74LVTH543PW

LXH543

TSSOP − PW

Tape and reel SN74LVTH543PWR

LXH543

TVSOP − DGV Tape and reel SN74LVTH543DGVR LXH543

CDIP − JT Tube SNJ54LVTH543JT SNJ54LVTH543JT

−55°C to 125°C

CFP − W Tube SNJ54LVTH543W SNJ54LVTH543W

−55 C to 125 C

LCCC − FK Tube SNJ54LVTH543FK SNJ54LVTH543FK

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

    !"#$% !%&% 

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (17 pages)

PAGE 1
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 D Support Mixed-Mode Signal Operation D D D D SN54LVTH543 . . .
PAGE 2
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 description/ordering information (continued) The ’LVTH543 devices contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register, to permit independent control in either direction of data flow.
PAGE 3
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 logic diagram (positive logic) OEBA CEBA LEBA OEAB CEAB LEAB A1 2 23 1 13 11 14 C1 3 1D 22 B1 C1 1D To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, JT, NS, PW, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 recommended operating conditions (see Note 4) SN54LVTH543 SN74LVTH543 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage 0.8 0.8 Input voltage 5.5 5.
PAGE 5
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 2.7 V, VCC = 2.7 V to 3.6 V, II = −18 mA IOH = −100 µA VCC = 2.7 V, IOH = −8 mA IOH = −24 mA VCC = 3 V VOL VCC = 3 V Ioff II(hold) A or B ports SN74LVTH543 TYP† MAX MIN −1.2 VCC−0.2 2.4 −1.2 2 0.2 0.2 IOL = 24 mA IOL = 16 mA 0.5 0.5 0.
PAGE 6
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) SN54LVTH543 VCC = 3.3 V ± 0.3 V MIN tw tsu th Pulse duration, LEAB or LEBA low MAX SN74LVTH543 VCC = 3.3 V ± 0.3 V VCC = 2.7 V MIN MAX MIN MAX VCC = 2.7 V MIN 3.3 3.3 3.3 3.3 0.4 0.4 0.4 0.4 1 1.5 1 1.
PAGE 7
SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT 1.5 V Timing Input 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.5 V Input 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVTH543DBR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SSOP DB 24 2000 330.0 16.4 8.2 8.8 2.5 12.0 16.0 Q1 SN74LVTH543DWR SOIC DW 24 2000 330.0 24.4 10.75 15.7 2.7 12.0 24.0 Q1 SN74LVTH543PWR TSSOP PW 24 2000 330.0 16.4 6.95 8.3 1.6 8.0 16.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH543DBR SSOP DB 24 2000 367.0 367.0 38.0 SN74LVTH543DWR SOIC DW 24 2000 367.0 367.0 45.0 SN74LVTH543PWR TSSOP PW 24 2000 367.0 367.0 38.
PAGE 12
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PAGE 16
MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters.
PAGE 17
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.